2003-08-28 19:23:15 +02:00
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#define ASSEMBLY 1
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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2004-10-21 19:06:49 +02:00
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#include <arch/romcc_io.h>
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#include <cpu/x86/lapic.h>
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2003-08-28 19:23:15 +02:00
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#include "pc80/mc146818rtc_early.c"
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#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
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#include "northbridge/amd/amdk8/early_ht.c"
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2004-10-21 19:06:49 +02:00
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#include "cpu/x86/lapic/boot_cpu.c"
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2005-10-25 23:46:09 +02:00
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#include "cpu/x86/mtrr/earlymtrr.c"
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2003-08-28 19:23:15 +02:00
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#include "northbridge/amd/amdk8/reset_test.c"
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2004-10-21 19:06:49 +02:00
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static unsigned long main(unsigned long bist)
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2003-08-28 19:23:15 +02:00
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{
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2005-08-05 20:55:52 +02:00
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unsigned nodeid;
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2004-10-21 19:06:49 +02:00
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/* Make cerain my local apic is useable */
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enable_lapic();
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2003-08-28 19:23:15 +02:00
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2005-08-05 20:55:52 +02:00
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nodeid=lapicid();
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2004-10-21 19:06:49 +02:00
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/* Is this a cpu only reset? */
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2005-10-25 23:46:09 +02:00
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if (early_mtrr_init_detected()) {
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2003-08-28 19:23:15 +02:00
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if (last_boot_normal()) {
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2004-10-21 19:06:49 +02:00
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goto normal_image;
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2003-08-28 19:23:15 +02:00
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} else {
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2005-10-25 23:46:09 +02:00
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goto fallback_image;
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2003-08-28 19:23:15 +02:00
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}
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}
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/* Is this a secondary cpu? */
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2004-10-21 19:06:49 +02:00
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if (!boot_cpu()) {
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if (last_boot_normal()) {
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goto normal_image;
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} else {
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goto fallback_image;
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}
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}
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/* Nothing special needs to be done to find bus 0 */
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/* Allow the HT devices to be found */
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enumerate_ht_chain();
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/* Setup the 8111 */
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amd8111_enable_rom();
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/* Is this a deliberate reset by the bios */
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if (bios_reset_detected() && last_boot_normal()) {
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goto normal_image;
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2003-08-28 19:23:15 +02:00
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}
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/* This is the primary cpu how should I boot? */
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else if (do_normal_boot()) {
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2004-10-21 19:06:49 +02:00
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goto normal_image;
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}
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else {
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goto fallback_image;
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2003-08-28 19:23:15 +02:00
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}
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2004-10-21 19:06:49 +02:00
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normal_image:
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asm volatile ("jmp __normal_image"
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: /* outputs */
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: "a" (bist) /* inputs */
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: /* clobbers */
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);
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fallback_image:
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return bist;
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2003-08-28 19:23:15 +02:00
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}
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