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mb/fb/watson: enable IPMI_KCS for watson_v2 

For watson_v2 mainboard variant:
* Enable IPMI_KCS in config.
* In early_mainboard_romstage_entry(), enable LPC IO ports
for IPMI over KCS.

Signed-off-by: Ravi Rama <rrama@arista.com>
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ie0e718b44889678c49f3d61cccd0e33b306fc6f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51310
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jonathan Zhang 2021-02-22 12:17:30 -08:00 committed by Angel Pons
parent 2f32b5b5d0
commit 019c0049a2
4 changed files with 20 additions and 1 deletions
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1
src/mainboard/facebook/watson/Kconfig
View File

@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select INTEGRATED_UART
select IPMI_KCS if BOARD_FACEBOOK_WATSON_V2
select SERIRQ_CONTINUOUS_MODE
select MAINBOARD_USES_IFD_GBE_REGION
select MAINBOARD_HAS_LPC_TPM

1
src/mainboard/facebook/watson/include/variants.h
View File

@ -21,5 +21,6 @@
#include <soc/romstage.h>
void variant_romstage_fsp_init_params(UPD_DATA_REGION *UpdData);
void variant_early_mainboard_romstage_entry(void);
#endif /* BASEBOARD_VARIANTS_H */

7
src/mainboard/facebook/watson/romstage.c
View File

@ -25,7 +25,7 @@
*/
void early_mainboard_romstage_entry(void)
{
variant_early_mainboard_romstage_entry();
}
/**
@ -52,3 +52,8 @@ __weak void variant_romstage_fsp_init_params(UPD_DATA_REGION *UpdData)
{
}
__weak void variant_early_mainboard_romstage_entry(void)
{
}

12
src/mainboard/facebook/watson/variants/watson_v2/romstage.c
View File

@ -15,6 +15,9 @@
* GNU General Public License for more details.
*/
#include <device/pci_ops.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
#include <variants.h>
@ -46,3 +49,12 @@ void variant_romstage_fsp_init_params(UPD_DATA_REGION *UpdData)
UpdData->HotPlug_PchPciPort7 = 1;
UpdData->HotPlug_PchPciPort8 = 1;
}
void variant_early_mainboard_romstage_entry(void)
{
// Enable LPC IO ports 0xca2, 0xca8 for IPMI
pci_write_config32(PCH_DEV_LPC, LPC_GEN2_DEC,
(0 << 16) | ALIGN_DOWN(0xca2, 4) | 1);
pci_write_config32(PCH_DEV_LPC, LPC_GEN3_DEC,
(0 << 16) | ALIGN_DOWN(0xca8, 4) | 1);
}