mb/ripto: Update ALC5682 headset interrupt configurations

As per schematics configure headset interrupt as
edge both for ripto and volteer baseboard.

BUG=b:147085988
BRANCH=none
TEST=Build and boot ripto board. Test that jack functionality
is working fine and also confirm with evtest.

Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Change-Id: I8e1625140ccf55db8cb0fe3c039f1c31c01069b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41335
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
This commit is contained in:
Shaunak Saha 2020-05-12 10:37:59 -07:00 committed by Patrick Georgi
parent 9e9f301b58
commit 022d935919
4 changed files with 4 additions and 4 deletions

View File

@ -243,7 +243,7 @@ chip soc/intel/tigerlake
register "hid" = ""10EC5682"" register "hid" = ""10EC5682""
register "name" = ""RT58"" register "name" = ""RT58""
register "desc" = ""Realtek RT5682"" register "desc" = ""Realtek RT5682""
register "irq" = "ACPI_IRQ_EDGE_HIGH(GPP_F8_IRQ)" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F8)"
# Set the jd_src to RT5668_JD1 for jack detection # Set the jd_src to RT5668_JD1 for jack detection
register "property_count" = "1" register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"

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@ -260,7 +260,7 @@ static const struct pad_config gpio_table[] = {
/* F7 : GPPF7_STRAP */ /* F7 : GPPF7_STRAP */
PAD_NC(GPP_F7, NONE), PAD_NC(GPP_F7, NONE),
/* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */ /* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */
PAD_CFG_GPI_APIC(GPP_F8, UP_20K, DEEP, EDGE_BOTH, INVERT), PAD_CFG_GPI_INT(GPP_F8, NONE, PLTRST, EDGE_BOTH),
/* F9 : Reserved ==> NC */ /* F9 : Reserved ==> NC */
PAD_NC(GPP_F9, NONE), PAD_NC(GPP_F9, NONE),
/* F10 : GPPF10_STRAP */ /* F10 : GPPF10_STRAP */

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@ -255,7 +255,7 @@ static const struct pad_config gpio_table[] = {
/* F7 : GPPF7_STRAP */ /* F7 : GPPF7_STRAP */
PAD_NC(GPP_F7, NONE), PAD_NC(GPP_F7, NONE),
/* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */ /* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */
PAD_CFG_GPI_APIC(GPP_F8, UP_20K, DEEP, EDGE_BOTH, INVERT), PAD_CFG_GPI_INT(GPP_F8, NONE, PLTRST, EDGE_BOTH),
/* F9 : Reserved ==> NC */ /* F9 : Reserved ==> NC */
/* F10 : GPPF10_STRAP */ /* F10 : GPPF10_STRAP */
PAD_NC(GPP_F10, DN_20K), PAD_NC(GPP_F10, DN_20K),

View File

@ -255,7 +255,7 @@ static const struct pad_config gpio_table[] = {
/* F7 : GPPF7_STRAP */ /* F7 : GPPF7_STRAP */
PAD_NC(GPP_F7, DN_20K), PAD_NC(GPP_F7, DN_20K),
/* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */ /* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */
PAD_CFG_GPI_APIC(GPP_F8, UP_20K, DEEP, EDGE_BOTH, INVERT), PAD_CFG_GPI_INT(GPP_F8, NONE, PLTRST, EDGE_BOTH),
/* F9 : Reserved ==> NC */ /* F9 : Reserved ==> NC */
/* F10 : GPPF10_STRAP */ /* F10 : GPPF10_STRAP */
PAD_NC(GPP_F10, DN_20K), PAD_NC(GPP_F10, DN_20K),