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mb/google/sarien/variants/sarien: Add GPIO H15 for DVT1 

Follow b:123342945 to add GPIO H15(BT_RADIO_DIS#) for DVT1.

BUG=b:123342945
TEST=Built and tested on sarien system

Change-Id: I0caf97f6a2a8abf2914667350c76300733ead1b8
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/31330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
John Su 2019-02-11 17:35:24 +08:00 committed by Patrick Georgi
parent e0f3400547
commit 025c575750
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/sarien/variants/sarien/gpio.c
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@ -200,7 +200,7 @@ static const struct pad_config gpio_table[] = {
/* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE), /* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE),
/* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE), /* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE),
/* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE), /* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE),
/* M2_SKT2_CFG3 */ PAD_NC(GPP_H15, NONE), /* M2_SKT2_CFG3 */ PAD_CFG_GPO(GPP_H15, 1, DEEP), /* BT_RADIO_DIS# */
/* DDPF_CTRLCLK */ PAD_NC(GPP_H16, NONE), /* DDPF_CTRLCLK */ PAD_NC(GPP_H16, NONE),
/* DPPF_CTRLDATA */ PAD_NC(GPP_H17, NONE), /* DPPF_CTRLDATA */ PAD_NC(GPP_H17, NONE),
/* CPU_C10_GATE# */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10_GATE# */ /* CPU_C10_GATE# */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10_GATE# */