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soc/amd/common/block/gpio_banks: factor out get_gpio_mux 

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I7d7a8c5a7188fd558a577352f8b246e61f3edd63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Felix Held 2021-08-03 03:36:53 +02:00
parent 35cee38c71
commit 029a4a0b88
1 changed files with 7 additions and 2 deletions
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9
src/soc/amd/common/block/gpio_banks/gpio.c
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@ -160,15 +160,20 @@ uint16_t gpio_acpi_pin(gpio_t gpio)
return gpio; return gpio;
} }
static uint8_t get_gpio_mux(gpio_t gpio)
{
return iomux_read8(gpio);
}
static void set_gpio_mux(gpio_t gpio, uint8_t function) static void set_gpio_mux(gpio_t gpio, uint8_t function)
{ {
iomux_write8(gpio, function & AMD_GPIO_MUX_MASK); iomux_write8(gpio, function & AMD_GPIO_MUX_MASK);
iomux_read8(gpio); /* Flush posted write */ get_gpio_mux(gpio); /* Flush posted write */
} }
void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save) void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save)
{ {
save->mux_value = iomux_read8(gpio); save->mux_value = get_gpio_mux(gpio);
save->control_value = gpio_read32(gpio); save->control_value = gpio_read32(gpio);
} }