Fix whitespace for ma785gm
Fix tabs and whitespace for ma785gm mainboard.c file. Change-Id: I8c94bf428bc4e78871da8c64f89221af4151e16d Signed-off-by: Alec Ari <neotheuser@ymail.com> Reviewed-on: http://review.coreboot.org/923 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
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@ -91,7 +91,7 @@ void set_pcie_reset()
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*/
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*/
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int is_dev3_present(void)
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int is_dev3_present(void)
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{
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{
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return 0;
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return 0;
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}
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}
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/*
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/*
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@ -122,16 +122,16 @@ static void set_gpio40_gfx(void)
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sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
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sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
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/* set the gfx to 1x16 lanes */
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/* set the gfx to 1x16 lanes */
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printk(BIOS_INFO, "Dev3 is not present. GFX Configuration is One x16 slot\n");
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printk(BIOS_INFO, "Dev3 is not present. GFX Configuration is One x16 slot\n");
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/* when the gpio40 is configured as GPIO, this will enable the output */
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/* when the gpio40 is configured as GPIO, this will enable the output */
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pci_write_config32(sm_dev, 0xf8, 0x4);
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pci_write_config32(sm_dev, 0xf8, 0x4);
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dword = pci_read_config32(sm_dev, 0xfc);
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dword = pci_read_config32(sm_dev, 0xfc);
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dword &= ~(1 << 10);
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dword &= ~(1 << 10);
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/* When the gpio40 is configured as GPIO, this will represent the output value*/
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/* When the gpio40 is configured as GPIO, this will represent the output value*/
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/* 1 :enable two x8 , 0 : master slot enable only */
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/* 1 :enable two x8 , 0 : master slot enable only */
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dword &= ~(1 << 26);
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dword &= ~(1 << 26);
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pci_write_config32(sm_dev, 0xfc, dword);
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pci_write_config32(sm_dev, 0xfc, dword);
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}
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}
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/*************************************************
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/*************************************************
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