cpu/x86: Link entry16.inc
Change-Id: I78ecd15716169b58cf6696ff8c5069ac2d5038ef Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47967 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -10,13 +10,12 @@
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#include <cpu/x86/cr.h>
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#include <cpu/x86/cr.h>
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.section .init._start, "ax", @progbits
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.section .init, "ax", @progbits
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/*
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/*
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* Include the old code for reset vector and protected mode entry. That code has
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* Include the old code for reset vector and protected mode entry. That code has
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* withstood the test of time.
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* withstood the test of time.
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*/
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*/
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#include <cpu/x86/16bit/entry16.inc>
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#include <cpu/x86/16bit/reset16.inc>
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#include <cpu/x86/16bit/reset16.inc>
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#include <cpu/x86/32bit/entry32.inc>
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#include <cpu/x86/32bit/entry32.inc>
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@ -13,6 +13,7 @@
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*/
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*/
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.align 4
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.align 4
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.globl __protected_start
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__protected_start:
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__protected_start:
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/* Save the BIST value */
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/* Save the BIST value */
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movl %eax, %ebp
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movl %eax, %ebp
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@ -8,6 +8,8 @@ ramstage-y += backup_default_smm.c
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subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
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subdirs-$(CONFIG_CPU_INTEL_COMMON_SMM) += ../intel/smm
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bootblock-y += entry16.S
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additional-dirs += $(obj)/cpu/x86
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additional-dirs += $(obj)/cpu/x86
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SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf
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SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf
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@ -1,3 +1,5 @@
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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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/*
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* This software and ancillary information (herein called SOFTWARE)
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* This software and ancillary information (herein called SOFTWARE)
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* called LinuxBIOS is made available under the terms described here.
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* called LinuxBIOS is made available under the terms described here.
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@ -28,8 +30,10 @@
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#include <arch/rom_segs.h>
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#include <arch/rom_segs.h>
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#include <cpu/x86/post_code.h>
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#include <cpu/x86/post_code.h>
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/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
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.section .init._start, "ax", @progbits
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* Startup IPI message without RAM.
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/* Symbol _start16bit must reachable from the reset vector, and be aligned to
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* 4kB to start AP CPUs with Startup IPI message without RAM.
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*/
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*/
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.align 4096
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.align 4096
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.code16
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.code16
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