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soc/intel/broadwell: Include EC and IRQ links ACPI early 

Other southbridges such as Lynx Point do it. This eases merging later.

Change-Id: I10196bbc44ce859c2747755845378351f45944ae
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46766
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-25 14:01:06 +01:00
parent a42d37ac3f
commit 040f3be59e
1 changed files with 4 additions and 2 deletions
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6
src/soc/intel/broadwell/pch/acpi/lpc.asl
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@ -31,6 +31,10 @@ Device (LPCB)
IOD1, 8, IOD1, 8,
} }
#include <southbridge/intel/common/acpi/irqlinks.asl>
#include "acpi/ec.asl"
Device (DMAC) // DMA Controller Device (DMAC) // DMA Controller
{ {
Name (_HID, EISAID("PNP0200")) Name (_HID, EISAID("PNP0200"))
@ -180,7 +184,5 @@ Device (LPCB)
} }
#include "gpio.asl" #include "gpio.asl"
#include <southbridge/intel/common/acpi/irqlinks.asl>
#include "acpi/ec.asl"
#include "acpi/superio.asl" #include "acpi/superio.asl"
} }