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mb/google/brask/var/kuldax: Add ACPI _PLD custom values 

This patch uses ACPI _PLD macros to add custom values for USB ports.

     C0    A2  A3
   +----------------+
   |      REAR      |
   |                |
   |                |
   |                |
   |      FRONT     |
   +----------------+
       A1  A0

BUG=b:232419500
TEST=emerge-brask coreboot

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I5ada4e9b25102a9cfd3b02a2abcd956f6cbc5619
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65544
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Won Chung <wonchung@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
David Wu 2022-06-30 13:33:40 +08:00 committed by Felix Held
parent c4e90454f4
commit 05d135e6b0
1 changed files with 20 additions and 10 deletions
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30
src/mainboard/google/brya/variants/kuldax/overridetree.cb
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@ -180,7 +180,8 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
end
@ -192,31 +193,36 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(1, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A3 (MLB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(5, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(5, 1))"
device ref usb2_port6 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A2 (MLB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(6, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(6, 1))"
device ref usb2_port7 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A1 (MLB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(4, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(1, 2))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@ -229,25 +235,29 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(1, 2))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A1 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(4, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))"
device ref usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A2 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(6, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(6, 1))"
device ref usb3_port3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A3 (MLB)""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(5, 1)"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(5, 1))"
device ref usb3_port4 on end
end
end