soc/intel/common/block/cpu: Use tab instead of space

Convert the lines starts with whitespace with tab as applicable.

TEST=Built google/brya0 and ADLRVP with BUILD_TIMELESS=1: no changes.

Change-Id: Ibd11ad12caa1be866a851a8cd4bd23349e8ffbbe
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51375
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-03-09 14:40:39 +05:30
parent 492a792d38
commit 0603902525

View file

@ -398,15 +398,15 @@ find_llc_subleaf:
* Then we need to allocate just one way for non-eviction
* of RW data.
*/
movl $0x01, %eax
cmp $CONFIG_DCACHE_RAM_SIZE, %ecx
jnc set_eviction_mask
movl $0x01, %eax
cmp $CONFIG_DCACHE_RAM_SIZE, %ecx
jnc set_eviction_mask
/*
* RW data size / way size is equal to number of
* ways to be configured for non-eviction
*/
mov $CONFIG_DCACHE_RAM_SIZE, %eax
mov $CONFIG_DCACHE_RAM_SIZE, %eax
div %ecx
mov %eax, %ecx
movl $0x01, %eax
@ -441,11 +441,11 @@ set_eviction_mask:
* - If this bit is '0' - the way is protected from eviction
* - If this bit is '1' - the way is not protected from eviction
*/
mov $0x1, %eax
shl %cl, %eax
subl $0x01, %eax
mov %eax, %ecx
mov %ebx, %eax
mov $0x1, %eax
shl %cl, %eax
subl $0x01, %eax
mov %eax, %ecx
mov %ebx, %eax
xor $~0, %eax /* invert 32 bits */
and %ecx, %eax