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amd/stoneyridge: Remove PSP BAR init from cpu init 

Remove the step of setting PSP BAR3 from cpu_dev_ops .init.  The
BAR is configured in romstage by AmdInitPost().

Change-Id: I7e77fad3abdcb6482f1b9d849e5922a426dff5f5
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marshall Dawson 2017-09-04 16:13:08 -06:00 committed by Martin Roth
parent 0801b335dd
commit 06766c1efa
1 changed files with 0 additions and 18 deletions
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18
src/soc/amd/stoneyridge/model_15_init.c
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@ -30,23 +30,6 @@
#include <cpu/amd/amdfam15.h>
#include <arch/acpi.h>
#include <amdlib.h>
#include <PspBaseLib.h>
void PSPProgBar3Msr(void *Buffer);
void PSPProgBar3Msr(void *Buffer)
{
u32 Bar3Addr;
u64 Tmp64;
/* Get Bar3 Addr */
Bar3Addr = PspLibPciReadPspConfig(0x20);
Tmp64 = Bar3Addr;
printk(BIOS_DEBUG, "Bar3=%llx\n", Tmp64);
LibAmdMsrWrite(PSP_MSR_PRIVATE_BLOCK_BAR, &Tmp64, NULL);
LibAmdMsrRead(PSP_MSR_PRIVATE_BLOCK_BAR, &Tmp64, NULL);
}
static void model_15_init(device_t dev)
{
printk(BIOS_DEBUG, "Model 15 Init.\n");
@ -106,7 +89,6 @@ static void model_15_init(device_t dev)
}
printk(BIOS_DEBUG, "siblings = %02d, ", siblings);
#endif
PSPProgBar3Msr(NULL);
/* DisableCf8ExtCfg */
msr = rdmsr(NB_CFG_MSR);