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soc/intel/alderlake: Make C1e configurable 

Make it possible to enable C1e from the devicetree by adding
`c1e_enable`. C1e was disabled by ea2a38be32
for all RPL SOCs to reduce noise.

This will ensure that boards that disabled it based on CPUID are unchanged.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I758621393cb39345c2ba7b19a32872e84e1c5a19
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77088
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2023-08-08 13:56:37 +01:00 committed by Shelley Chen
parent b95ef282ff
commit 06f4f65d24
2 changed files with 4 additions and 1 deletions
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3
src/soc/intel/alderlake/chip.h
View File

@ -736,6 +736,9 @@ struct soc_intel_alderlake_config {
*/
bool disable_package_c_state_demotion;
/* Enable Enhanced C States */
bool enable_c1e;
/* i915 struct for GMA backlight control */
struct i915_gpu_controller_info gfx;

2
src/soc/intel/alderlake/fsp_params.c
View File

@ -1070,7 +1070,7 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
s_cfg->PkgCStateDemotion = !config->disable_package_c_state_demotion;
if (cpu_id == CPUID_RAPTORLAKE_J0 || cpu_id == CPUID_RAPTORLAKE_Q0)
s_cfg->C1e = 0;
s_cfg->C1e = config->enable_c1e;
else
s_cfg->C1e = 1;
#if CONFIG(SOC_INTEL_RAPTORLAKE) && !CONFIG(FSP_USE_REPO)