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soc/intel/skylake: Access conf pointer only if its not null 

conf pointer could be null, access it only if its not null.

Foundby=klocwork
BUG=N/A
TEST=N/A

Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Change-Id: I0611e15d52edd8e69e4234b8ac602f35efba4015
Reviewed-on: https://review.coreboot.org/c/30862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Pratik Prajapati 2019-01-11 14:00:40 -08:00 committed by Patrick Georgi
parent 41169def5c
commit 07cbd7684f
2 changed files with 4 additions and 4 deletions
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4
src/soc/intel/skylake/acpi.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2009 coresystems GmbH
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corporation.
* Copyright (C) 2015-2019 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -519,7 +519,7 @@ void generate_cpu_entries(struct device *device)
printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n",
numcpus, cores_per_package);
if (config->eist_enable && config->speed_shift_enable) {
if (config && config->eist_enable && config->speed_shift_enable) {
struct cppc_config cppc_config;
cpu_init_cppc_config(&cppc_config, 2 /* version 2 */);
acpigen_write_CPPC_package(&cppc_config);

4
src/soc/intel/skylake/cpu.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015-2017 Intel Corporation.
* Copyright (C) 2015-2019 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -248,7 +248,7 @@ static void configure_thermal_target(void)
/* Set TCC activation offset if supported */
msr = rdmsr(MSR_PLATFORM_INFO);
if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
if ((msr.lo & (1 << 30)) && conf && conf->tcc_offset) {
msr = rdmsr(MSR_TEMPERATURE_TARGET);
msr.lo &= ~(0xf << 24); /* Bits 27:24 */
msr.lo |= (conf->tcc_offset & 0xf) << 24;