pnp: Allow setting of misc register 0xfa in device tree
Change-Id: I45885905f0adaa8f0ad9137d7034e6f7a0dc43de Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://chromium-review.googlesource.com/175356 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit 7fe642543a8de249e13c3d63c3302a20910c247d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6859 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -300,6 +300,11 @@ static void get_resources(device_t dev, struct pnp_info *info)
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resource->size = 1;
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resource->flags |= IORESOURCE_IRQ;
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}
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if (info->flags & PNP_MSC10) {
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resource = new_resource(dev, PNP_IDX_MSC10);
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resource->size = 1;
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resource->flags |= IORESOURCE_IRQ;
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}
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}
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void pnp_enable_devices(device_t base_dev, struct device_operations *ops,
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@ -48,6 +48,7 @@ struct pnp_info {
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#define PNP_EN 0x100
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#define PNP_MSC0 0x200
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#define PNP_MSC1 0x400
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#define PNP_MSC10 0x800
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struct io_info io0, io1, io2, io3;
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};
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struct resource *pnp_get_resource(device_t dev, unsigned index);
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@ -12,5 +12,6 @@
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#define PNP_IDX_DRQ1 0x75
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#define PNP_IDX_MSC0 0xf0
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#define PNP_IDX_MSC1 0xf1
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#define PNP_IDX_MSC10 0xfa
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#endif /* DEVICE_PNP_DEF_H */
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@ -207,7 +207,7 @@ static struct pnp_info pnp_dev_info[] = {
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/* Serial Port 1 */
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{ &ops, IT8772F_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
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/* Environmental Controller */
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{ &ops, IT8772F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
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{ &ops, IT8772F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC10,
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{0x0ff8, 0}, {0x0ffc, 4}, },
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/* KBC Keyboard */
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{ &ops, IT8772F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
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