mainboard/ocp/tiogapass: Set longer BMC timeout

The BMC isn't always ready in 60 seconds if it printing debug output.
Give it 90 seconds to finish before timing out in coreboot.

Change-Id: I3932d3e8fad067e8971e82b45b499801fc78079f
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Javier Galindo <javiergalindo@sysproconsulting.com>

src/mainboard/ocp/tiogapass/devicetree.cb

@@ -74,7 +74,7 @@ chip soc/intel/xeon_sp/skx
 			chip drivers/ipmi # BMC KCS
 				device pnp ca2.0 on end
 				register "bmc_i2c_address" = "0x20"
-				register "bmc_boot_timeout" = "60"
+				register "bmc_boot_timeout" = "90"
 			end
 		end # Intel Corporation C621 Series Chipset LPC/eSPI Controller
 		device pci 1f.2 on end # Intel Corporation C620 Series Chipset Family Power Management Controller