soc/mediatek/mt8183: Simplify usage of dramc_engine2_end
Since we always write to &ch[chn].ao.dummy_rd after calling dramc_engine2_end(), this write could be merged into dramc_engine2_end() to simplify code. BUG=none BRANCH=none TEST=emerge-kukui coreboot Change-Id: Ibb4bd5ed016118811ad2097098417c19f00f4263 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35749 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -607,9 +607,10 @@ static u32 dramc_engine2_run(u8 chn, enum dram_te_op wr)
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return result;
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}
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static void dramc_engine2_end(u8 chn)
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static void dramc_engine2_end(u8 chn, u32 dummy_rd)
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{
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clrbits_le32(&ch[chn].ao.test2_4, 0x1 << 17);
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write32(&ch[chn].ao.dummy_rd, dummy_rd);
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}
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static bool dramc_find_gating_window(u32 result_r, u32 result_f, u32 *debug_cnt,
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@ -995,8 +996,7 @@ static void dramc_rx_dqs_gating_cal(u8 chn, u8 rank, u8 freq_group,
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}
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}
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dramc_engine2_end(chn);
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write32(&ch[chn].ao.dummy_rd, dummy_rd_backup);
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dramc_engine2_end(chn, dummy_rd_backup);
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for (dqs = 0; dqs < DQS_NUMBER; dqs++) {
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pass_count[dqs] = dqs_transition[dqs];
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@ -1811,12 +1811,10 @@ static u8 dramc_window_perbit_cal(u8 chn, u8 rank, u8 freq_group,
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break;
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}
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if (type == RX_WIN_RD_DQC) {
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if (type == RX_WIN_RD_DQC)
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dramc_rx_rd_dqc_end(chn);
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} else {
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dramc_engine2_end(chn);
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write32(&ch[chn].ao.dummy_rd, dummy_rd_bak_engine2);
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}
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else
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dramc_engine2_end(chn, dummy_rd_bak_engine2);
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if (vref_scan_enable && type == RX_WIN_TEST_ENG)
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dramc_set_vref(chn, rank, type, vref_dly.best_vref);
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@ -1895,8 +1893,7 @@ static u8 dramc_rx_datlat_cal(u8 chn, u8 rank, u8 freq_group, const struct sdram
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dramc_dbg("Datlat=%2d, err_value=0x%4x, sum=%d\n", datlat, err, sum);
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}
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dramc_engine2_end(chn);
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write32(&ch[chn].ao.dummy_rd, dummy_rd_backup);
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dramc_engine2_end(chn, dummy_rd_backup);
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assert(sum != 0);
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