mb/*/mainboard.c: Get rid of SPI AFC register
The AFC—Additional Flash Control Register is set by southbridge code. Remove redundant calls and get rid of it in autoport. Change-Id: I627082e09dd055e3b3c4dd8e0b90965a9fcb4342 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19493 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -21,7 +21,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00800000;
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RCBA32(0x38c0) = 0x00000007;
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}
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static void mainboard_enable(device_t dev)
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@ -36,7 +36,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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RCBA32(0x2240) = 0x00330e71;
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RCBA32(0x2244) = 0x003f0eb1;
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RCBA32(0x2248) = 0x002102cd;
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@ -36,7 +36,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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RCBA32(0x2240) = 0x00330e71;
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RCBA32(0x2244) = 0x003f0eb1;
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RCBA32(0x2248) = 0x002102cd;
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@ -24,7 +24,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00000000;
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RCBA32(0x38c4) = 0x00000000;
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RCBA32(0x38c0) = 0x00000000;
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}
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static void mainboard_enable(device_t dev)
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@ -32,7 +32,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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static u8 mainboard_fill_ec_version(char *buf, u8 buf_len)
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@ -25,7 +25,6 @@ static void mainboard_init(device_t dev)
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/* init spi */
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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static void mainboard_enable(device_t dev)
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@ -34,7 +34,6 @@ static void mainboard_init(device_t dev)
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/* init spi */
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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static void mainboard_enable(device_t dev)
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@ -34,7 +34,6 @@ static void mainboard_init(device_t dev)
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/* init spi */
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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static void mainboard_enable(device_t dev)
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@ -38,7 +38,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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/* mainboard_enable is executed as first thing after
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@ -38,7 +38,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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// mainboard_enable is executed as first thing after
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@ -78,7 +78,6 @@ static void mainboard_init(device_t dev)
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RCBA32(0x38b4) = 0x03040002;
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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RCBA32(0x3804) = 0x3f04e008;
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printk(BIOS_SPEW, "SPI configured\n");
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@ -33,7 +33,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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// mainboard_enable is executed as first thing after
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@ -34,7 +34,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x38c0) = 0x00000007;
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}
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// mainboard_enable is executed as first thing after
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@ -74,7 +74,6 @@ static void mainboard_enable(device_t dev)
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RCBA32(0x389c) = 0x0601209f;
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RCBA32(0x38b0) = 0x00000004;
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RCBA32(0x38b4) = 0x03040002;
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RCBA32(0x38c0) = 0x00000007;
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RCBA32(0x38c8) = 0x00002005;
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RCBA32(0x38c4) = 0x00802005;
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RCBA32(0x3804) = 0x3f04e008;
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@ -22,7 +22,6 @@ static void mainboard_init(device_t dev)
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{
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RCBA32(0x38c8) = 0x00002009;
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RCBA32(0x38c4) = 0x00802009;
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RCBA32(0x38c0) = 0x00000007;
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}
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static void mainboard_enable(device_t dev)
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@ -180,7 +180,7 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
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/* SPI init */
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MainboardIncludes = append(MainboardIncludes, "southbridge/intel/bd82x6x/pch.h")
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/* FIXME:XX Move this to runtime. */
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for _, addr := range []uint16{0x38c8, 0x38c4, 0x38c0} {
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for _, addr := range []uint16{0x38c8, 0x38c4} {
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MainboardInit += fmt.Sprintf("\tRCBA32(0x%04x) = 0x%08x;\n", addr, inteltool.RCBA[addr])
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}
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