util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina

Firmware component that does memory training already limits the memory
controller to train at 5500 Mbps for all memory parts in Sabrina. Hence
removing this interim SPD change to limit the speed.

BUG=b:238074863
TEST=Build and boot to OS in Skyrim.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I2bc82c7407a97aac282708c3e0bd56ae99a8fc31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66290
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2022-07-29 17:19:48 -06:00 committed by Felix Held
parent 84753144d0
commit 0b4f49c792
9 changed files with 79 additions and 27 deletions

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@ -7,9 +7,9 @@ H9JCNNNCP3MLYR-N6E,spd-2.hex
K3LKBKB0BM-MGCP,spd-3.hex K3LKBKB0BM-MGCP,spd-3.hex
H9JCNNNBK3MLYR-N6E,spd-1.hex H9JCNNNBK3MLYR-N6E,spd-1.hex
MT62F2G32D8DR-031 WT:B,spd-4.hex MT62F2G32D8DR-031 WT:B,spd-4.hex
K3LKLKL0EM-MGCN,spd-1.hex K3LKLKL0EM-MGCN,spd-5.hex
H58G56AK6BX069,spd-3.hex H58G56AK6BX069,spd-3.hex
MT62F1G32D4DS-031 WT:B,spd-2.hex MT62F1G32D4DS-031 WT:B,spd-2.hex
K3LKCKC0BM-MGCP,spd-5.hex K3LKCKC0BM-MGCP,spd-6.hex
MT62F1G32D2DS-026 WT:B,spd-3.hex MT62F1G32D2DS-026 WT:B,spd-7.hex
MT62F2G32D4DS-026 WT:B,spd-5.hex MT62F2G32D4DS-026 WT:B,spd-8.hex

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@ -1,11 +1,11 @@
23 11 13 0E 85 19 95 18 00 40 00 00 02 02 00 00 23 11 13 0E 85 19 95 18 00 40 00 00 02 02 00 00
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@ -1,11 +1,11 @@
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@ -1,11 +1,11 @@
23 11 13 0E 86 21 95 18 00 40 00 00 02 02 00 00 23 11 13 0E 86 21 95 18 00 40 00 00 02 02 00 00
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@ -1,11 +1,11 @@
23 11 13 0E 85 21 F9 18 00 40 00 00 09 02 00 00 23 11 13 0E 85 21 F9 18 00 40 00 00 09 02 00 00
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@ -1,6 +1,6 @@
23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00 23 11 13 0E 85 19 95 18 00 40 00 00 02 02 00 00
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32
spd/lp5/set-1/spd-6.hex Normal file
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@ -0,0 +1,32 @@
23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00
00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60
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32
spd/lp5/set-1/spd-8.hex Normal file
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@ -0,0 +1,32 @@
23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00
00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60
04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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@ -70,7 +70,6 @@ type LP5Set struct {
otherOptionalFeatures byte otherOptionalFeatures byte
busWidthEncoding byte busWidthEncoding byte
speedToTCKMinPs map[int]int speedToTCKMinPs map[int]int
maxSpeedMbps int
} }
/* ------------------------------------------------------------------------------------------ */ /* ------------------------------------------------------------------------------------------ */
@ -235,8 +234,6 @@ var LP5SetInfo = map[int]LP5Set{
* Set to 0x02. * Set to 0x02.
*/ */
busWidthEncoding: 0x02, busWidthEncoding: 0x02,
/* Sabrina supports max speed of 5500 MT/s */
maxSpeedMbps: 5500,
}, },
} }
@ -640,14 +637,6 @@ func LP5EncodeTRFCPBMinLsb(memAttribs *LP5MemAttributes) byte {
return byte(convNsToMtb(memAttribs.TRFCPBNs) & 0xff) return byte(convNsToMtb(memAttribs.TRFCPBNs) & 0xff)
} }
func LP5UpdateSpeedMbps(memAttribs *LP5MemAttributes) {
f, ok := LP5SetInfo[LP5CurrSet]
if ok && f.maxSpeedMbps != 0 && memAttribs.SpeedMbps > f.maxSpeedMbps {
memAttribs.SpeedMbps = f.maxSpeedMbps
}
}
func LP5UpdateTCKMin(memAttribs *LP5MemAttributes) { func LP5UpdateTCKMin(memAttribs *LP5MemAttributes) {
if memAttribs.TCKMinPs == 0 { if memAttribs.TCKMinPs == 0 {
memAttribs.TCKMinPs = LP5GetTCKMinPs(memAttribs) memAttribs.TCKMinPs = LP5GetTCKMinPs(memAttribs)
@ -695,7 +684,6 @@ func LP5UpdateTRPPB(memAttribs *LP5MemAttributes) {
} }
func lp5UpdateMemoryAttributes(memAttribs *LP5MemAttributes) { func lp5UpdateMemoryAttributes(memAttribs *LP5MemAttributes) {
LP5UpdateSpeedMbps(memAttribs)
LP5UpdateTCKMin(memAttribs) LP5UpdateTCKMin(memAttribs)
LP5UpdateTAAMin(memAttribs) LP5UpdateTAAMin(memAttribs)
LP5UpdateTRFCAB(memAttribs) LP5UpdateTRFCAB(memAttribs)