ipq806x: move GPIO definitions to the proper include file
When the IPQ SPI driver was ported to coreboot, a few GPIO related definitions ended up in a wrong include file. Move them to the proper place and get rid of duplicated definition of GPIO_OUT. BUG=chrome-os-partner:27784, chrome-os-partner:29871 TEST=proto0 still boots with the new firmware Original-Change-Id: I4b06067a71c85efaf0e48f29e232f83fd1f725a8 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/205328 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org> (cherry picked from commit df73bb0023f5eaf5594ef41b3632c4402ebf126c) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I109e62e3bfc9bd15640ff697be7634f42435a3e4 Reviewed-on: http://review.coreboot.org/8058 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -35,6 +35,14 @@
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typedef unsigned int gpio_t;
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typedef unsigned int gpio_t;
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#define GPIO_FUNC_ENABLE 1
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#define GPIO_FUNC_DISABLE 0
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#define FUNC_SEL_1 1
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#define FUNC_SEL_3 3
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#define FUNC_SEL_GPIO 0
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#define GPIO_DRV_STR_10MA 0x4
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#define GPIO_DRV_STR_11MA 0x7
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/* GPIO TLMM: Direction */
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/* GPIO TLMM: Direction */
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#define GPIO_INPUT 0
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#define GPIO_INPUT 0
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#define GPIO_OUTPUT 1
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#define GPIO_OUTPUT 1
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@ -229,14 +229,6 @@
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#define GSBI7_SPI_MISO 7
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#define GSBI7_SPI_MISO 7
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#define GSBI7_SPI_MOSI 6
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#define GSBI7_SPI_MOSI 6
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#define GPIO_FUNC_ENABLE 1
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#define GPIO_FUNC_DISABLE 0
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#define FUNC_SEL_1 1
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#define FUNC_SEL_3 3
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#define FUNC_SEL_GPIO 0
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#define GPIO_DRV_STR_10MA 0x4
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#define GPIO_DRV_STR_11MA 0x7
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#define GPIO_OUT 1
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#define MSM_GSBI_MAX_FREQ 51200000
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#define MSM_GSBI_MAX_FREQ 51200000
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#define SPI_RESET_STATE 0
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#define SPI_RESET_STATE 0
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@ -277,9 +277,9 @@ static void CS_change(int port_num, int cs_num, int enable)
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uint32_t addr = GPIO_IN_OUT_ADDR(cs_gpio);
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uint32_t addr = GPIO_IN_OUT_ADDR(cs_gpio);
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uint32_t val = readl_i(addr);
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uint32_t val = readl_i(addr);
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val &= (~(1 << GPIO_OUT));
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val &= (~(1 << GPIO_OUTPUT));
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if (!enable)
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if (!enable)
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val |= (1 << GPIO_OUT);
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val |= (1 << GPIO_OUTPUT);
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writel_i(val, addr);
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writel_i(val, addr);
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}
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}
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