soc/amd/picasso: Add console & timestamp buffers to psp_verstage
Create areas for console & timestamp data in psp_verstage and pass it to the x86 to save for use later. BUG=b:159220781 TEST=Build & Boot trembyle Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I41c8d7a1565e761187e941d7d6021805a9744d06 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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0c12abe462
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@ -60,6 +60,7 @@ DECLARE_REGION(framebuffer)
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DECLARE_REGION(pdpt)
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DECLARE_REGION(opensbi)
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DECLARE_REGION(bl31)
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DECLARE_REGION(transfer_buffer)
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/*
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* Put this into a .c file accessing a linker script region to mark that region
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@ -0,0 +1,32 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef PSP_VERSTAGE_PSP_TRANSFER_H
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#define PSP_VERSTAGE_PSP_TRANSFER_H
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#define TRANSFER_INFO_SIZE 64
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#define TIMESTAMP_BUFFER_SIZE 0x200
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#define TRANSFER_MAGIC_VAL 0x50544953
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/* Area for things that would cause errors in a linker script */
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#if !defined(__ASSEMBLER__)
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#include <stdint.h>
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struct transfer_info_struct {
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uint32_t magic_val; /* Identifier */
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uint32_t struct_bytes; /* Size of this structure */
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uint32_t buffer_size; /* Size of the transfer buffer area */
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/* Offsets from start of transfer buffer */
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uint32_t workbuf_offset;
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uint32_t console_offset;
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uint32_t timestamp_offset;
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uint32_t fmap_offset;
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uint32_t unused[9]; /* Pad to 64 bytes */
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};
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_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, \
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"TRANSFER_INFO_SIZE is incorrect");
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#endif
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#endif /* PSP_VERSTAGE_PSP_TRANSFER_H */
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@ -1,6 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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#include <soc/psp_transfer.h>
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#include <fmap_config.h>
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/*
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* Start of available space is 0x15000 and this is where the
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@ -11,8 +13,6 @@
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#define PSP_SRAM_SIZE 160K
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#define VERSTAGE_START 0x15000
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#define VBOOT_WORK_SIZE 12K
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#define FMAP_CACHE_SIZE 2K
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/*
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* The temp stack can be made much smaller if needed - even 256 bytes
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@ -52,9 +52,15 @@ SECTIONS
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_everstage = .;
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ALIGN_COUNTER(64)
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REGION(vboot2_work, ., VBOOT_WORK_SIZE, 64)
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_transfer_buffer = .;
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REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4)
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ALIGN_COUNTER(64)
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REGION(vboot2_work, ., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE, 64)
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ALIGN_COUNTER(64)
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PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)
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TIMESTAMP(., TIMESTAMP_BUFFER_SIZE)
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FMAP_CACHE(., FMAP_SIZE)
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_etransfer_buffer = .;
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PSP_VERSTAGE_TEMP_STACK_END = (PSP_VERSTAGE_TEMP_STACK_START + PSP_VERSTAGE_TEMP_STACK_SIZE );
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@ -2,6 +2,7 @@
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#include <memlayout.h>
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#include <arch/header.ld>
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#include <soc/psp_transfer.h>
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#define EARLY_RESERVED_DRAM_START(addr) SYMBOL(early_reserved_dram, addr)
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#define EARLY_RESERVED_DRAM_END(addr) SYMBOL(eearly_reserved_dram, addr)
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@ -38,14 +39,16 @@
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* | Unused hole |
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* +--------------------------------+
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* | FMAP cache (FMAP_SIZE) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200
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* | Early Timestamp region (512B) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + PSP_SHAREDMEM_SIZE + PRERAM_CBMEM_CONSOLE_SIZE
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* | Preram CBMEM console |
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* | (PRERAM_CBMEM_CONSOLE_SIZE) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + PSP_SHAREDMEM_SIZE
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + PSP_SHAREDMEM_SIZE
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* | PSP shared (vboot workbuf) |
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* | (PSP_SHAREDMEM_SIZE) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40
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* | Transfer Info Structure |
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* +--------------------------------+ PSP_SHAREDMEM_BASE
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* | APOB (64KiB) |
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* +--------------------------------+ PSP_APOB_DRAM_ADDRESS
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@ -72,14 +75,18 @@ SECTIONS
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#if CONFIG(VBOOT)
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PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE)
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_transfer_buffer = .;
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REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4)
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VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE)
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PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE)
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#endif
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PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)
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TIMESTAMP(., 0x200)
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TIMESTAMP(., TIMESTAMP_BUFFER_SIZE)
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FMAP_CACHE(., FMAP_SIZE)
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#if CONFIG(VBOOT)
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_etransfer_buffer = .;
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#endif
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_ = ASSERT((CONFIG_BOOTBLOCK_ADDR + CONFIG_C_ENV_BOOTBLOCK_SIZE - 0x10) == CONFIG_X86_RESET_VECTOR, "Reset vector should be -0x10 from end of bootblock");
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_ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned");
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BOOTBLOCK(CONFIG_BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE)
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@ -8,6 +8,7 @@
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#include <commonlib/region.h>
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#include <console/console.h>
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#include <fmap.h>
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#include <soc/psp_transfer.h>
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#include <security/vboot/misc.h>
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#include <security/vboot/symbols.h>
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#include <security/vboot/vboot_common.h>
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@ -120,8 +121,9 @@ static uint32_t update_boot_region(struct vb2_context *ctx)
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static uint32_t save_buffers(struct vb2_context **ctx)
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{
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uint32_t retval;
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uint32_t buffer_size = DEFAULT_WORKBUF_TRANSFER_SIZE;
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uint32_t buffer_size = MIN_TRANSFER_BUFFER_SIZE;
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uint32_t max_buffer_size;
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struct transfer_info_struct buffer_info = {0};
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/*
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* This should never fail, but if it does, we should still try to
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@ -130,28 +132,47 @@ static uint32_t save_buffers(struct vb2_context **ctx)
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if (svc_get_max_workbuf_size(&max_buffer_size)) {
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post_code(POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE);
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printk(BIOS_NOTICE, "Notice: using default transfer buffer size.\n");
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max_buffer_size = DEFAULT_WORKBUF_TRANSFER_SIZE;
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max_buffer_size = MIN_TRANSFER_BUFFER_SIZE;
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}
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printk(BIOS_DEBUG, "\nMaximum buffer size: %d bytes\n", max_buffer_size);
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retval = vb2api_relocate(_vboot2_work, _vboot2_work, buffer_size, ctx);
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/* Shrink workbuf if MP2 is in use and cannot be used to save buffer */
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if (max_buffer_size < VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) {
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retval = vb2api_relocate(_vboot2_work, _vboot2_work, MIN_WORKBUF_TRANSFER_SIZE,
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ctx);
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if (retval != VB2_SUCCESS) {
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printk(BIOS_ERR, "Error shrinking workbuf. Error code %#x\n", retval);
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buffer_size = VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE;
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post_code(POSTCODE_WORKBUF_RESIZE_WARNING);
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}
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} else {
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buffer_size =
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(uint32_t)((uintptr_t)_etransfer_buffer - (uintptr_t)_transfer_buffer);
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buffer_info.console_offset = (uint32_t)((uintptr_t)_preram_cbmem_console -
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(uintptr_t)_transfer_buffer);
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buffer_info.timestamp_offset = (uint32_t)((uintptr_t)_timestamp -
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(uintptr_t)_transfer_buffer);
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buffer_info.fmap_offset = (uint32_t)((uintptr_t)_fmap_cache -
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(uintptr_t)_transfer_buffer);
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}
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if (buffer_size > max_buffer_size) {
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printk(BIOS_ERR, "Error: Workbuf is larger than max buffer size.\n");
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printk(BIOS_ERR, "Error: Buffer is larger than max buffer size.\n");
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post_code(POSTCODE_WORKBUF_BUFFER_SIZE_ERROR);
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return POSTCODE_WORKBUF_BUFFER_SIZE_ERROR;
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}
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retval = svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, (void *)_vboot2_work,
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buffer_info.magic_val = TRANSFER_MAGIC_VAL;
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buffer_info.struct_bytes = sizeof(buffer_info);
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buffer_info.buffer_size = buffer_size;
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buffer_info.workbuf_offset = (uint32_t)((uintptr_t)_fmap_cache -
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(uintptr_t)_vboot2_work);
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retval = svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, (void *)_transfer_buffer,
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buffer_size);
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if (retval) {
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printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n",
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retval);
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printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n", retval);
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return POSTCODE_WORKBUF_SAVE_ERROR;
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}
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@ -193,6 +214,9 @@ void Main(void)
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verstage_main();
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vb2api_relocate(_vboot2_work, _vboot2_work, VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE,
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&ctx);
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post_code(POSTCODE_SAVE_BUFFERS);
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retval = save_buffers(&ctx);
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if (retval)
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@ -4,6 +4,7 @@
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#define PSP_VERSTAGE_H
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#include <stdint.h>
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#include <soc/psp_transfer.h>
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#define EMBEDDED_FW_SIGNATURE 0x55aa55aa
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#define PSP_COOKIE 0x50535024 /* 'PSP$' */
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#define POSTCODE_LEAVING_VERSTAGE 0xF2
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#define SPI_ADDR_MASK 0x00ffffff
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#define DEFAULT_WORKBUF_TRANSFER_SIZE (8 * KiB)
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#define MIN_TRANSFER_BUFFER_SIZE (8 * KiB)
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#define MIN_WORKBUF_TRANSFER_SIZE (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE)
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struct psp_ef_table {
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uint32_t signature; /* 0x55aa55aa */
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