soc/intel/fsp_broadwell_de: Move FSP_DEBUG_LEVEL option here

It is not mentioned in the FSP spec and doesn't seem to be implemented
for any other FSP than the Broadwell-DE one.

Change-Id: I87c758204f1aabf13f47de19fd87c6e1ed67258e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/31300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/drivers/intel/fsp1_0/Kconfig

@@ -34,17 +34,6 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x4000
 
-config FSP_1_0_DEBUG_LEVEL
-	int "FSP debug level (0-3)"
-	default 0
-	range 0 3
-	help
-	  Select the debug level, where:
-	   0: DISABLED
-	   1: MINIMUM
-	   2: NORMAL
-	   3: MAXIMUM
-
 config FSP_HEADER_PATH
 	string "Location of FSP headers"
 	help

src/soc/intel/fsp_broadwell_de/fsp/Kconfig

@@ -127,3 +127,14 @@ config FSP_EHCI2_ENABLE
 	default n
 	help
 	  Enable EHCI controller 2
+
+config FSP_DEBUG_LEVEL
+	int "FSP debug level (0-3)"
+	default 0
+	range 0 3
+	help
+	  Select the debug level, where:
+	   0: DISABLED
+	   1: MINIMUM
+	   2: NORMAL
+	   3: MAXIMUM

src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c

@@ -69,7 +69,7 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
 	if (!IS_ENABLED(CONFIG_CONSOLE_SERIAL))
 		UpdData->SerialPortType = 0;
 
-	UpdData->DebugOutputLevel = CONFIG_FSP_1_0_DEBUG_LEVEL;
+	UpdData->DebugOutputLevel = CONFIG_FSP_DEBUG_LEVEL;
 
 	/*
 	 * Memory Down