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vc/amd/cezanne: Add support to map UARTs 

This will allow coreboot to directly write to the UART controller.

BUG=b:215599230
TEST=Try mapping the uart on guybrush

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ibd346cec2994e612f2901bb91d572982ce2ed5e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
This commit is contained in:
Raul E Rangel 2022-02-03 15:21:04 -07:00 committed by Felix Held
parent 51c75ac0df
commit 0d6972fcb2
1 changed files with 7 additions and 0 deletions
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7
src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h
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@ -88,10 +88,17 @@ enum fch_io_device {
FCH_IO_DEVICE_MISC, FCH_IO_DEVICE_MISC,
FCH_IO_DEVICE_AOAC, FCH_IO_DEVICE_AOAC,
FCH_IO_DEVICE_IOPORT, FCH_IO_DEVICE_IOPORT,
FCH_IO_DEVICE_UART,
FCH_IO_DEVICE_END, FCH_IO_DEVICE_END,
}; };
enum fch_uart_id {
FCH_UART_ID_0 = 0,
FCH_UART_ID_1 = 1,
FCH_UART_ID_MAX,
};
enum fch_i2c_controller_id { enum fch_i2c_controller_id {
FCH_I2C_CONTROLLER_ID_0 = 0, FCH_I2C_CONTROLLER_ID_0 = 0,
FCH_I2C_CONTROLLER_ID_1 = 1, FCH_I2C_CONTROLLER_ID_1 = 1,