soc/mediatek: Move wdt_set_req() to common folder
There are more and more variables which are SoC-specific, so add soc/wdt.h for each SoC and rename common/wdt.h to common/wdt_common.h. wdt_set_req() is almost the same for mt8192, mt8195 and mt8186, so move it to a common file wdt_req.c. TEST=build pass BUG=b:233720142 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I7a334b3e7cd4f24a848dd31aca546dc7236d5fb8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65636 Reviewed-by: Yidi Lin <yidilin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
parent
d4e07090ff
commit
0e03fa3f6e
|
@ -1,8 +1,9 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef SOC_MEDIATEK_COMMON_WDT_H
|
||||
#define SOC_MEDIATEK_COMMON_WDT_H
|
||||
#ifndef SOC_MEDIATEK_WDT_COMMON_H
|
||||
#define SOC_MEDIATEK_WDT_COMMON_H
|
||||
|
||||
#include <device/mmio.h>
|
||||
#include <stdint.h>
|
||||
#include <soc/addressmap.h>
|
||||
|
||||
|
@ -39,10 +40,17 @@ enum {
|
|||
MTK_WDT_STA_HW_RST = 1 << 31
|
||||
};
|
||||
|
||||
/* WDT_REQ */
|
||||
#define MTK_WDT_REQ_MOD_KEY_VAL 0x33
|
||||
#define MTK_WDT_REQ_IRQ_KEY_VAL 0x44
|
||||
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_MOD_KEY, 31, 24)
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_IRQ_KEY, 31, 24)
|
||||
|
||||
static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
|
||||
|
||||
int mtk_wdt_init(void);
|
||||
void mtk_wdt_clr_status(void);
|
||||
void mtk_wdt_set_req(void);
|
||||
|
||||
#endif /* SOC_MEDIATEK_COMMON_WDT_H */
|
||||
#endif /* SOC_MEDIATEK_WDT_COMMON_H */
|
|
@ -1,20 +1,12 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <device/mmio.h>
|
||||
#include <soc/addressmap.h>
|
||||
#include <soc/wdt.h>
|
||||
|
||||
#define MTK_WDT_REQ_MOD_KEY_VAL 0x33
|
||||
#define MTK_WDT_REQ_IRQ_KEY_VAL 0x44
|
||||
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_MOD_KEY, 31, 24)
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_IRQ_KEY, 31, 24)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
|
||||
|
||||
void mtk_wdt_set_req(void)
|
||||
{
|
||||
SET32_BITFIELDS(&mtk_wdt->wdt_req_mode,
|
||||
MTK_WDT_SPM_THERMAL_EN, MTK_WDT_SPM_THERMAL_VAL,
|
||||
MTK_WDT_THERMAL_EN, 1,
|
||||
MTK_WDT_REQ_MOD_KEY, MTK_WDT_REQ_MOD_KEY_VAL);
|
||||
SET32_BITFIELDS(&mtk_wdt->wdt_req_irq_en,
|
|
@ -0,0 +1,8 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef SOC_MEDIATEK_MT8173_WDT_H
|
||||
#define SOC_MEDIATEK_MT8173_WDT_H
|
||||
|
||||
#include <soc/wdt_common.h>
|
||||
|
||||
#endif /* SOC_MEDIATEK_MT8173_WDT_H */
|
|
@ -0,0 +1,8 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef SOC_MEDIATEK_MT8183_WDT_H
|
||||
#define SOC_MEDIATEK_MT8183_WDT_H
|
||||
|
||||
#include <soc/wdt_common.h>
|
||||
|
||||
#endif /* SOC_MEDIATEK_MT8183_WDT_H */
|
|
@ -14,7 +14,7 @@ bootblock-y += gic.c
|
|||
bootblock-y += ../common/mmu_operations.c
|
||||
bootblock-y += ../common/pll.c pll.c
|
||||
bootblock-y += ../common/tracker.c ../common/tracker_v1.c
|
||||
bootblock-y += ../common/wdt.c wdt.c
|
||||
bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
|
||||
|
||||
romstage-y += ../common/cbmem.c
|
||||
romstage-y += ../common/dram_init.c
|
||||
|
|
|
@ -0,0 +1,14 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef SOC_MEDIATEK_MT8186_WDT_H
|
||||
#define SOC_MEDIATEK_MT8186_WDT_H
|
||||
|
||||
#include <soc/wdt_common.h>
|
||||
|
||||
#define MTK_WDT_SPM_THERMAL_VAL 0
|
||||
|
||||
DEFINE_BIT(MTK_WDT_SPM_THERMAL_EN, 0)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
|
||||
|
||||
#endif /* SOC_MEDIATEK_MT8186_WDT_H */
|
|
@ -10,26 +10,8 @@
|
|||
#include <soc/wdt.h>
|
||||
|
||||
#define MTK_WDT_CLR_STATUS_VAL 0x22
|
||||
#define MTK_WDT_REQ_MOD_KEY_VAL 0x33
|
||||
#define MTK_WDT_REQ_IRQ_KEY_VAL 0x44
|
||||
|
||||
DEFINE_BITFIELD(MTK_WDT_CLR_STATUS, 31, 24)
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_MOD_KEY, 31, 24)
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_IRQ_KEY, 31, 24)
|
||||
DEFINE_BIT(MTK_WDT_SPM_THERMAL_EN, 0)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
|
||||
|
||||
void mtk_wdt_set_req(void)
|
||||
{
|
||||
SET32_BITFIELDS(&mtk_wdt->wdt_req_mode,
|
||||
MTK_WDT_SPM_THERMAL_EN, 0,
|
||||
MTK_WDT_THERMAL_EN, 1,
|
||||
MTK_WDT_REQ_MOD_KEY, MTK_WDT_REQ_MOD_KEY_VAL);
|
||||
SET32_BITFIELDS(&mtk_wdt->wdt_req_irq_en,
|
||||
MTK_WDT_THERMAL_IRQ, 0,
|
||||
MTK_WDT_REQ_IRQ_KEY, MTK_WDT_REQ_IRQ_KEY_VAL);
|
||||
}
|
||||
|
||||
void mtk_wdt_clr_status(void)
|
||||
{
|
||||
|
|
|
@ -13,7 +13,7 @@ bootblock-y += ../common/eint_event.c
|
|||
bootblock-y += ../common/mmu_operations.c
|
||||
bootblock-y += ../common/pll.c pll.c
|
||||
bootblock-y += ../common/tracker.c ../common/tracker_v2.c
|
||||
bootblock-y += ../common/wdt.c wdt.c
|
||||
bootblock-y += ../common/wdt.c ../common/wdt_req.c
|
||||
|
||||
romstage-y += ../common/auxadc.c
|
||||
romstage-y += ../common/cbmem.c
|
||||
|
|
|
@ -0,0 +1,14 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef SOC_MEDIATEK_MT8192_WDT_H
|
||||
#define SOC_MEDIATEK_MT8192_WDT_H
|
||||
|
||||
#include <soc/wdt_common.h>
|
||||
|
||||
#define MTK_WDT_SPM_THERMAL_VAL 1
|
||||
|
||||
DEFINE_BIT(MTK_WDT_SPM_THERMAL_EN, 0)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
|
||||
|
||||
#endif /* SOC_MEDIATEK_MT8192_WDT_H */
|
|
@ -15,7 +15,7 @@ bootblock-y += ../common/mmu_operations.c
|
|||
bootblock-$(CONFIG_PCI) += pcie.c
|
||||
bootblock-y += ../common/pll.c pll.c
|
||||
bootblock-y += ../common/tracker.c ../common/tracker_v2.c
|
||||
bootblock-y += ../common/wdt.c wdt.c
|
||||
bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
|
||||
|
||||
romstage-y += ../common/cbmem.c
|
||||
romstage-y += ../common/clkbuf.c
|
||||
|
|
|
@ -0,0 +1,14 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef SOC_MEDIATEK_MT8195_WDT_H
|
||||
#define SOC_MEDIATEK_MT8195_WDT_H
|
||||
|
||||
#include <soc/wdt_common.h>
|
||||
|
||||
#define MTK_WDT_SPM_THERMAL_VAL 1
|
||||
|
||||
DEFINE_BIT(MTK_WDT_SPM_THERMAL_EN, 0)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
|
||||
|
||||
#endif /* SOC_MEDIATEK_MT8195_WDT_H */
|
|
@ -5,23 +5,6 @@
|
|||
#include <soc/wdt.h>
|
||||
|
||||
#define MTK_WDT_CLR_STATUS 0x230001FF
|
||||
#define MTK_WDT_REQ_MOD_KEY_VAL 0x33
|
||||
#define MTK_WDT_REQ_IRQ_KEY_VAL 0x44
|
||||
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_MOD_KEY, 31, 24)
|
||||
DEFINE_BITFIELD(MTK_WDT_REQ_IRQ_KEY, 31, 24)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_EN, 18)
|
||||
DEFINE_BIT(MTK_WDT_THERMAL_IRQ, 18)
|
||||
|
||||
void mtk_wdt_set_req(void)
|
||||
{
|
||||
SET32_BITFIELDS(&mtk_wdt->wdt_req_mode,
|
||||
MTK_WDT_THERMAL_EN, 1,
|
||||
MTK_WDT_REQ_MOD_KEY, MTK_WDT_REQ_MOD_KEY_VAL);
|
||||
SET32_BITFIELDS(&mtk_wdt->wdt_req_irq_en,
|
||||
MTK_WDT_THERMAL_IRQ, 0,
|
||||
MTK_WDT_REQ_IRQ_KEY, MTK_WDT_REQ_IRQ_KEY_VAL);
|
||||
}
|
||||
|
||||
void mtk_wdt_clr_status(void)
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue