fsp_baytrail/fsp_broadwell_de: Sort entries in Makefile.inc
Change-Id: I12e6ec4aec7dcadcbb886c3fc4c3b9126a0a835c Signed-off-by: Sourabh Kashyap <sourabhka@hcl.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34744 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -17,47 +17,51 @@
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ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y)
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ifeq ($(CONFIG_SOC_INTEL_FSP_BAYTRAIL),y)
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subdirs-y += fsp
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subdirs-y += romstage
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subdirs-y += romstage
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../cpu/x86/cache
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/x86/cache
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../lib/fsp
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subdirs-y += ../../../lib/fsp
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subdirs-y += fsp
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ramstage-y += memmap.c
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romstage-y += memmap.c
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ramstage-y += tsc_freq.c
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romstage-y += tsc_freq.c
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postcar-y += tsc_freq.c
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smm-y += tsc_freq.c
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ramstage-y += spi.c
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romstage-y += spi.c
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smm-y += spi.c
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ramstage-y += chip.c
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ramstage-y += iosf.c
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romstage-y += iosf.c
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ramstage-y += northcluster.c
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ramstage-y += ramstage.c
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ramstage-y += gpio.c
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romstage-y += gpio.c
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romstage-y += gpio.c
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romstage-y += iosf.c
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romstage-y += memmap.c
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romstage-y += pmutil.c
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romstage-y += pmutil.c
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ramstage-y += pmutil.c
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romstage-y += spi.c
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ramstage-y += southcluster.c
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romstage-y += tsc_freq.c
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ramstage-y += cpu.c
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postcar-y += tsc_freq.c
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ramstage-y += acpi.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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ramstage-y += cpu.c
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ramstage-y += gfx.c
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ramstage-y += gpio.c
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ramstage-y += i2c.c
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ramstage-y += iosf.c
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ramstage-y += lpe.c
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ramstage-y += lpe.c
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ramstage-y += lpss.c
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ramstage-y += lpss.c
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smm-y += pmutil.c
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ramstage-y += memmap.c
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smm-y += smihandler.c
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ramstage-y += northcluster.c
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ramstage-y += pmutil.c
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ramstage-y += ramstage.c
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ramstage-y += southcluster.c
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ramstage-y += spi.c
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ramstage-y += tsc_freq.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += spi.c
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smm-y += tsc_freq.c
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# Remove as ramstage gets fleshed out
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ramstage-y += placeholders.c
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ramstage-y += placeholders.c
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ramstage-y += i2c.c
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ramstage-y += gfx.c
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/include
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/include
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp
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@ -13,5 +13,5 @@
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# GNU General Public License for more details.
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# GNU General Public License for more details.
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#
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#
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ramstage-y += chipset_fsp_util.c
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romstage-y += chipset_fsp_util.c
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romstage-y += chipset_fsp_util.c
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ramstage-y += chipset_fsp_util.c
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@ -1,44 +1,47 @@
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ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y)
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ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y)
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subdirs-y += fsp
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subdirs-y += romstage
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subdirs-y += romstage
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../cpu/x86/cache
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/x86/cache
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subdirs-y += ../../../lib/fsp
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subdirs-y += ../../../lib/fsp
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subdirs-y += fsp
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romstage-y += gpio.c
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romstage-y += gpio.c
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ramstage-y += cpu.c
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ramstage-y += chip.c
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ramstage-y += northcluster.c
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ramstage-y += ramstage.c
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ramstage-y += tsc_freq.c
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romstage-y += memmap.c
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romstage-y += memmap.c
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ramstage-y += memmap.c
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ramstage-y += southcluster.c
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ramstage-y += acpi.c
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ramstage-y += smbus_common.c
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ramstage-y += smbus.c
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romstage-y += tsc_freq.c
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romstage-y += tsc_freq.c
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postcar-y += tsc_freq.c
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postcar-y += tsc_freq.c
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ramstage-y += smi.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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ramstage-y += cpu.c
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ramstage-y += gpio.c
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ramstage-y += gpio.c
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ramstage-y += iou_complto.c
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ramstage-y += iou_complto.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
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ramstage-y += memmap.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
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ramstage-y += northcluster.c
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ramstage-y += ramstage.c
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ramstage-y += smbus.c
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ramstage-y += smbus_common.c
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ramstage-y += smi.c
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ramstage-y += southcluster.c
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ramstage-y += tsc_freq.c
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ramstage-y += vtd.c
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ramstage-y += vtd.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
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smm-y += pmutil.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += smihandler.c
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smm-y += tsc_freq.c
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smm-y += tsc_freq.c
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cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-56-*)
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/include
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/include
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/
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CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/
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cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-56-*)
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endif # ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y)
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endif # ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y)
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