Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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0f61a4fc98
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@ -134,9 +134,9 @@ config MMCONF_SUPPORT
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bool
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bool
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default n
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default n
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config LB_MEM_TOPK
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config RAMTOP
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hex
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hex
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default 0x800
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default 0x200000
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config COMPRESSED_PAYLOAD_LZMA
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config COMPRESSED_PAYLOAD_LZMA
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bool
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bool
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@ -360,11 +360,11 @@ define CONFIG_UNCOMPRESSED
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export always
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export always
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comment "Set for uncompressed image"
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comment "Set for uncompressed image"
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end
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end
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define CONFIG_LB_MEM_TOPK
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define CONFIG_RAMTOP
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format "%d"
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format "%d"
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default 2048
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default 2048*1024
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export always
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export always
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comment "Kilobytes of memory to initialized before executing code from RAM"
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comment "Highest RAM that coreboot_ram will use"
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end
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end
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define CONFIG_HAVE_OPTION_TABLE
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define CONFIG_HAVE_OPTION_TABLE
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default 0
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default 0
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@ -103,8 +103,8 @@ SECTIONS
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_stack = .;
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_stack = .;
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.stack . : {
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.stack . : {
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/* Reserve a stack for each possible cpu */
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/* Reserve a stack for each possible cpu */
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/* the stack for ap will be put after pgtbl in 1M to CONFIG_LB_MEM_TOPK range when VGA and ROM_RUN and CONFIG_LB_MEM_TOPK>1024*/
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/* the stack for ap will be put after pgtbl in 1M to CONFIG_RAMTOP range when VGA and ROM_RUN and CONFIG_RAMTOP>1M*/
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. = ((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN)&&(CONFIG_RAMBASE<0x100000)&&(CONFIG_LB_MEM_TOPK>(0x100000>>10)) ) ? CONFIG_STACK_SIZE : (CONFIG_MAX_CPUS*CONFIG_STACK_SIZE);
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. = ((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN)&&(CONFIG_RAMBASE<0x100000)&&(CONFIG_RAMTOP>0x100000) ) ? CONFIG_STACK_SIZE : (CONFIG_MAX_CPUS*CONFIG_STACK_SIZE);
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}
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}
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_estack = .;
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_estack = .;
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_heap = .;
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_heap = .;
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@ -120,9 +120,9 @@ SECTIONS
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_ram_seg = _text;
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_ram_seg = _text;
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_eram_seg = _eheap;
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_eram_seg = _eheap;
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_bogus = ASSERT( ( (_eram_seg>>10) < (CONFIG_LB_MEM_TOPK)) , "please increase CONFIG_LB_MEM_TOPK");
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_bogus = ASSERT( ( _eram_seg < (CONFIG_RAMTOP)) , "please increase CONFIG_RAMTOP");
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_bogus = ASSERT( !((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN) && ((_ram_seg<0xa0000) && (_eram_seg>0xa0000))) , "please increase CONFIG_LB_MEM_TOPK and if still fail, try to set CONFIG_RAMBASE more than 1M");
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_bogus = ASSERT( !((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN) && ((_ram_seg<0xa0000) && (_eram_seg>0xa0000))) , "please increase CONFIG_RAMTOP and if still fail, try to set CONFIG_RAMBASE more than 1M");
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/DISCARD/ : {
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/DISCARD/ : {
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*(.comment)
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*(.comment)
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@ -53,7 +53,7 @@ static void dbgp_init(void)
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* debug_info data structure to our version defined above. */
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* debug_info data structure to our version defined above. */
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dbg_infox = (struct ehci_debug_info *)
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dbg_infox = (struct ehci_debug_info *)
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((CONFIG_LB_MEM_TOPK << 10) - sizeof(struct ehci_debug_info));
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((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info));
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memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info));
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memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info));
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}
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}
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@ -246,7 +246,7 @@ clear_fixed_var_mtrr_out:
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/* enable memory access for first MBs using top_mem */
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/* enable memory access for first MBs using top_mem */
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movl $TOP_MEM, %ecx
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movl $TOP_MEM, %ecx
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xorl %edx, %edx
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xorl %edx, %edx
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movl $(((CONFIG_LB_MEM_TOPK << 10) + TOP_MEM_MASK) & ~TOP_MEM_MASK) , %eax
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movl $(((CONFIG_RAMTOP) + TOP_MEM_MASK) & ~TOP_MEM_MASK) , %eax
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wrmsr
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wrmsr
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#endif /* CONFIG_USE_FAILOVER_IMAGE == 1*/
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#endif /* CONFIG_USE_FAILOVER_IMAGE == 1*/
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@ -9,15 +9,15 @@ static void __attribute__((noinline)) clear_init_ram(void)
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#if CONFIG_HAVE_ACPI_RESUME == 1
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#if CONFIG_HAVE_ACPI_RESUME == 1
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/* clear only coreboot used region of memory. Note: this may break ECC enabled boards */
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/* clear only coreboot used region of memory. Note: this may break ECC enabled boards */
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clear_memory( CONFIG_RAMBASE, (CONFIG_LB_MEM_TOPK << 10) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
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clear_memory( CONFIG_RAMBASE, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
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#else
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#else
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clear_memory(0, ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_SIZE));
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clear_memory(0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE));
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#endif
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#endif
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}
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}
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/* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/
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/* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/
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static void set_init_ram_access(void)
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static void set_init_ram_access(void)
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{
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{
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set_var_mtrr(0, 0x00000000, CONFIG_LB_MEM_TOPK << 10, MTRR_TYPE_WRBACK);
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set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK);
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}
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}
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@ -56,13 +56,13 @@ static void post_cache_as_ram(void)
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print_debug_pcar("testx = ", testx);
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print_debug_pcar("testx = ", testx);
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/* copy data from cache as ram to
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/* copy data from cache as ram to
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ram need to set CONFIG_LB_MEM_TOPK to 2048 and use var mtrr instead.
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ram need to set CONFIG_RAMTOP to 2M and use var mtrr instead.
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*/
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*/
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#if CONFIG_LB_MEM_TOPK <= 1024
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#if CONFIG_RAMTOP <= 0x100000
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#error "You need to set CONFIG_LB_MEM_TOPK greater than 1024"
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#error "You need to set CONFIG_RAMTOP greater than 1M"
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#endif
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#endif
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set_init_ram_access(); /* So we can access RAM from [1M, CONFIG_LB_MEM_TOPK) */
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set_init_ram_access(); /* So we can access RAM from [1M, CONFIG_RAMTOP) */
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// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x8000, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x7c00);
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// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x8000, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x7c00);
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print_debug("Copying data from cache to RAM -- switching to use RAM as stack... ");
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print_debug("Copying data from cache to RAM -- switching to use RAM as stack... ");
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@ -76,14 +76,14 @@ static void post_cache_as_ram(void)
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);
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);
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#endif
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#endif
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memcopy((void *)((CONFIG_LB_MEM_TOPK<<10)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
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memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
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// dump_mem((CONFIG_LB_MEM_TOPK<<10) - 0x8000, (CONFIG_LB_MEM_TOPK<<10) - 0x7c00);
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// dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00);
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__asm__ volatile (
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__asm__ volatile (
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/* set new esp */ /* before CONFIG_RAMBASE */
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/* set new esp */ /* before CONFIG_RAMBASE */
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"subl %0, %%ebp\n\t"
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"subl %0, %%ebp\n\t"
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"subl %0, %%esp\n\t"
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"subl %0, %%esp\n\t"
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::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_LB_MEM_TOPK<<10) )
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::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )
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); // We need to push %eax to the stack (CAR) before copy stack and pop it later after copy stack and change esp
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); // We need to push %eax to the stack (CAR) before copy stack and pop it later after copy stack and change esp
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#if 0
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#if 0
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__asm__ volatile (
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__asm__ volatile (
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@ -102,10 +102,10 @@ static void post_cache_as_ram(void)
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disable_cache_as_ram_bsp();
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disable_cache_as_ram_bsp();
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print_debug("Clearing initial memory region: ");
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print_debug("Clearing initial memory region: ");
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clear_init_ram(); //except the range from [(CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_SIZE, (CONFIG_LB_MEM_TOPK<<10))
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clear_init_ram(); //except the range from [(CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE, (CONFIG_RAMTOP))
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print_debug("Done\r\n");
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print_debug("Done\r\n");
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// dump_mem((CONFIG_LB_MEM_TOPK<<10) - 0x8000, (CONFIG_LB_MEM_TOPK<<10) - 0x7c00);
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// dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00);
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#ifndef CONFIG_MEM_TRAIN_SEQ
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#ifndef CONFIG_MEM_TRAIN_SEQ
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#define CONFIG_MEM_TRAIN_SEQ 0
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#define CONFIG_MEM_TRAIN_SEQ 0
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@ -113,7 +113,7 @@ static void post_cache_as_ram(void)
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set_sysinfo_in_ram(1); // So other core0 could start to train mem
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set_sysinfo_in_ram(1); // So other core0 could start to train mem
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#if CONFIG_MEM_TRAIN_SEQ == 1
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#if CONFIG_MEM_TRAIN_SEQ == 1
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// struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
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// struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
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// wait for ap memory to trained
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// wait for ap memory to trained
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// wait_all_core0_mem_trained(sysinfox); // moved to lapic_init_cpus.c
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// wait_all_core0_mem_trained(sysinfox); // moved to lapic_init_cpus.c
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@ -33,7 +33,7 @@
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void cpus_ready_for_init(void)
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void cpus_ready_for_init(void)
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{
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{
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#if CONFIG_MEM_TRAIN_SEQ == 1
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#if CONFIG_MEM_TRAIN_SEQ == 1
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struct sys_info *sysinfox = (struct sys_info *)((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
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struct sys_info *sysinfox = (struct sys_info *)((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
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// wait for ap memory to trained
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// wait for ap memory to trained
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wait_all_core0_mem_trained(sysinfox);
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wait_all_core0_mem_trained(sysinfox);
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#endif
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#endif
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@ -182,7 +182,7 @@ static void set_init_ecc_mtrrs(void)
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msr.lo = 0x00000000 | MTRR_TYPE_WRBACK;
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msr.lo = 0x00000000 | MTRR_TYPE_WRBACK;
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wrmsr(MTRRphysBase_MSR(0), msr);
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wrmsr(MTRRphysBase_MSR(0), msr);
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msr.hi = 0x000000ff;
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msr.hi = 0x000000ff;
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msr.lo = ~((CONFIG_LB_MEM_TOPK << 10) - 1) | 0x800;
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msr.lo = ~((CONFIG_RAMTOP) - 1) | 0x800;
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wrmsr(MTRRphysMask_MSR(0), msr);
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wrmsr(MTRRphysMask_MSR(0), msr);
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/* Set the default type to write combining */
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/* Set the default type to write combining */
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@ -308,8 +308,8 @@ static void init_ecc_memory(unsigned node_id)
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/* Don't start too early */
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/* Don't start too early */
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begink = startk;
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begink = startk;
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if (begink < CONFIG_LB_MEM_TOPK) {
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if (begink < (CONFIG_RAMTOP >> 10)) {
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begink = CONFIG_LB_MEM_TOPK;
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begink = (CONFIG_RAMTOP >>10);
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}
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}
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printk_debug("Clearing memory %luK - %luK: ", begink, endk);
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printk_debug("Clearing memory %luK - %luK: ", begink, endk);
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@ -38,7 +38,7 @@ static void do_amd_early_mtrr_init(const unsigned long *mtrr_msrs)
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/* Enable memory access for 0 - 1MB using top_mem */
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/* Enable memory access for 0 - 1MB using top_mem */
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msr.hi = 0;
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msr.hi = 0;
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msr.lo = (((CONFIG_LB_MEM_TOPK << 10) + TOP_MEM_MASK) & ~TOP_MEM_MASK);
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msr.lo = (((CONFIG_RAMTOP) + TOP_MEM_MASK) & ~TOP_MEM_MASK);
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wrmsr(TOP_MEM, msr);
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wrmsr(TOP_MEM, msr);
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#if defined(CONFIG_XIP_ROM_SIZE)
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#if defined(CONFIG_XIP_ROM_SIZE)
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@ -246,17 +246,17 @@ int start_cpu(device_t cpu)
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index = ++last_cpu_index;
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index = ++last_cpu_index;
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/* Find end of the new processors stack */
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/* Find end of the new processors stack */
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#if (CONFIG_LB_MEM_TOPK>1024) && (CONFIG_RAMBASE < 0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
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#if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE < 0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
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if(index<1) { // only keep bsp on low
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if(index<1) { // only keep bsp on low
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stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
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stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
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} else {
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} else {
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// for all APs, let use stack after pgtbl, 20480 is the pgtbl size for every cpu
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// for all APs, let use stack after pgtbl, 20480 is the pgtbl size for every cpu
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stack_end = 0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS - (CONFIG_STACK_SIZE*index);
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stack_end = 0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS - (CONFIG_STACK_SIZE*index);
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#if (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS) > (CONFIG_LB_MEM_TOPK<<10)
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#if (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS) > (CONFIG_RAMTOP)
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#warning "We may need to increase CONFIG_LB_MEM_TOPK, it need to be more than (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS)\n"
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#warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS)\n"
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#endif
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#endif
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if(stack_end > (CONFIG_LB_MEM_TOPK<<10)) {
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if(stack_end > (CONFIG_RAMTOP)) {
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printk_debug("start_cpu: Please increase the CONFIG_LB_MEM_TOPK more than %luK\n", stack_end>>10);
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printk_debug("start_cpu: Please increase the CONFIG_RAMTOP more than %luK\n", stack_end);
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die("Can not go on\n");
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die("Can not go on\n");
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}
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}
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stack_end -= sizeof(struct cpu_info);
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stack_end -= sizeof(struct cpu_info);
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#if defined(CONFIG_XIP_ROM_BASE) && !defined(CONFIG_XIP_ROM_SIZE)
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#if defined(CONFIG_XIP_ROM_BASE) && !defined(CONFIG_XIP_ROM_SIZE)
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# error "CONFIG_XIP_ROM_BASE without CONFIG_XIP_ROM_SIZE"
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# error "CONFIG_XIP_ROM_BASE without CONFIG_XIP_ROM_SIZE"
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#endif
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#endif
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#if !defined(CONFIG_LB_MEM_TOPK)
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#if !defined(CONFIG_RAMTOP)
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# error "CONFIG_LB_MEM_TOPK not defined"
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# error "CONFIG_RAMTOP not defined"
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#endif
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#endif
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#if defined(CONFIG_XIP_ROM_SIZE) && ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE -1)) != 0)
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#if defined(CONFIG_XIP_ROM_SIZE) && ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE -1)) != 0)
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# error "CONFIG_XIP_ROM_BASE is not a multiple of CONFIG_XIP_ROM_SIZE"
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# error "CONFIG_XIP_ROM_BASE is not a multiple of CONFIG_XIP_ROM_SIZE"
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#endif
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#endif
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#if (CONFIG_LB_MEM_TOPK & (CONFIG_LB_MEM_TOPK -1)) != 0
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#if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0
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# error "CONFIG_LB_MEM_TOPK must be a power of 2"
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# error "CONFIG_RAMTOP must be a power of 2"
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#endif
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#endif
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static void disable_var_mtrr(unsigned reg)
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static void disable_var_mtrr(unsigned reg)
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{
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{
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/* Enable caching for 0 - 1MB using variable mtrr */
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/* Enable caching for 0 - 1MB using variable mtrr */
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disable_cache();
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disable_cache();
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set_var_mtrr(0, 0x00000000, CONFIG_LB_MEM_TOPK << 10, type);
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set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, type);
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enable_cache();
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enable_cache();
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}
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}
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@ -54,19 +54,19 @@ void *map_2M_page(unsigned long page)
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struct pde pdp[512];
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struct pde pdp[512];
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} __attribute__ ((packed));
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} __attribute__ ((packed));
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#if (CONFIG_LB_MEM_TOPK>1024) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
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#if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
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/*
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/*
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pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,
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pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,
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and that region need to be used as vga font buffer. Please make sure set CONFIG_LB_MEM_TOPK=2048 in MB Config
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and that region need to be used as vga font buffer. Please make sure set CONFIG_RAMTOP=0x200000 in MB Config
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*/
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*/
|
||||||
struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M
|
struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M
|
||||||
|
|
||||||
unsigned x_end = 0x100000 + sizeof(struct pg_table) * CONFIG_MAX_CPUS;
|
unsigned x_end = 0x100000 + sizeof(struct pg_table) * CONFIG_MAX_CPUS;
|
||||||
#if (0x100000+20480*CONFIG_MAX_CPUS) > (CONFIG_LB_MEM_TOPK<<10)
|
#if (0x100000+20480*CONFIG_MAX_CPUS) > (CONFIG_RAMTOP)
|
||||||
#warning "We may need to increase CONFIG_LB_MEM_TOPK, it need to be more than (0x100000+20480*CONFIG_MAX_CPUS)\n"
|
#warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+20480*CONFIG_MAX_CPUS)\n"
|
||||||
#endif
|
#endif
|
||||||
if(x_end > (CONFIG_LB_MEM_TOPK<<10)) {
|
if(x_end > (CONFIG_RAMTOP)) {
|
||||||
printk_debug("map_2M_page: Please increase the CONFIG_LB_MEM_TOPK more than %dK\n", x_end>>10);
|
printk_debug("map_2M_page: Please increase the CONFIG_RAMTOP more than %dK\n", x_end);
|
||||||
die("Can not go on");
|
die("Can not go on");
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -80,7 +80,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -107,7 +107,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -75,7 +75,7 @@ static inline unsigned get_nodes(void)
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -95,9 +95,9 @@ config AMD_UCODE_PATCH_FILE
|
||||||
default "mc_patch_01000095.h"
|
default "mc_patch_01000095.h"
|
||||||
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
|
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
|
||||||
|
|
||||||
config LB_MEM_TOPK
|
config RAMTOP
|
||||||
hex
|
hex
|
||||||
default 0x4000
|
default 0x1000000
|
||||||
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
|
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
|
||||||
|
|
||||||
config HEAP_SIZE
|
config HEAP_SIZE
|
||||||
|
|
|
@ -98,7 +98,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_PCI_BUS_SEGN_BITS
|
uses CONFIG_PCI_BUS_SEGN_BITS
|
||||||
|
|
||||||
|
@ -135,7 +135,7 @@ default CONFIG_FAILOVER_SIZE=0x02000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
#if there is RAM on node0, we need to set it to 32M, otherwise can not access CAR on node0, and RAM on node1 at same time.
|
#if there is RAM on node0, we need to set it to 32M, otherwise can not access CAR on node0, and RAM on node1 at same time.
|
||||||
default CONFIG_LB_MEM_TOPK=16384
|
default CONFIG_RAMTOP=16384*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -74,7 +74,7 @@
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -93,7 +93,6 @@ uses CONFIG_HT_CHAIN_UNITID_BASE
|
||||||
uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
||||||
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||||
uses CONFIG_LB_MEM_TOPK
|
|
||||||
uses CONFIG_USE_PRINTK_IN_CAR
|
uses CONFIG_USE_PRINTK_IN_CAR
|
||||||
|
|
||||||
default CONFIG_ROM_SIZE = 512 * 1024
|
default CONFIG_ROM_SIZE = 512 * 1024
|
||||||
|
|
|
@ -41,7 +41,7 @@ uses CONFIG_XIP_ROM_BASE
|
||||||
uses CONFIG_STACK_SIZE
|
uses CONFIG_STACK_SIZE
|
||||||
uses CONFIG_HEAP_SIZE
|
uses CONFIG_HEAP_SIZE
|
||||||
# uses CONFIG_USE_OPTION_TABLE
|
# uses CONFIG_USE_OPTION_TABLE
|
||||||
# uses CONFIG_LB_MEM_TOPK
|
# uses CONFIG_RAMTOP
|
||||||
uses CONFIG_GENERATE_ACPI_TABLES
|
uses CONFIG_GENERATE_ACPI_TABLES
|
||||||
uses CONFIG_HAVE_ACPI_RESUME
|
uses CONFIG_HAVE_ACPI_RESUME
|
||||||
uses CONFIG_LB_CKS_RANGE_START
|
uses CONFIG_LB_CKS_RANGE_START
|
||||||
|
@ -147,7 +147,7 @@ default CONFIG_ROM_IMAGE_SIZE = 64 * 1024
|
||||||
default CONFIG_STACK_SIZE = 8 * 1024
|
default CONFIG_STACK_SIZE = 8 * 1024
|
||||||
default CONFIG_HEAP_SIZE = 256 * 1024
|
default CONFIG_HEAP_SIZE = 256 * 1024
|
||||||
# More 1M for pgtbl.
|
# More 1M for pgtbl.
|
||||||
# default CONFIG_LB_MEM_TOPK = 2048
|
# default CONFIG_RAMTOP = 2048*1024
|
||||||
default CONFIG_RAMBASE = 0x00004000
|
default CONFIG_RAMBASE = 0x00004000
|
||||||
# default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
|
# default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
|
||||||
default CONFIG_ROM_PAYLOAD = 1
|
default CONFIG_ROM_PAYLOAD = 1
|
||||||
|
|
|
@ -41,7 +41,7 @@ uses CONFIG_XIP_ROM_BASE
|
||||||
uses CONFIG_STACK_SIZE
|
uses CONFIG_STACK_SIZE
|
||||||
uses CONFIG_HEAP_SIZE
|
uses CONFIG_HEAP_SIZE
|
||||||
uses CONFIG_USE_OPTION_TABLE
|
uses CONFIG_USE_OPTION_TABLE
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
uses CONFIG_GENERATE_ACPI_TABLES
|
uses CONFIG_GENERATE_ACPI_TABLES
|
||||||
uses CONFIG_HAVE_MAINBOARD_RESOURCES
|
uses CONFIG_HAVE_MAINBOARD_RESOURCES
|
||||||
uses CONFIG_HAVE_ACPI_RESUME
|
uses CONFIG_HAVE_ACPI_RESUME
|
||||||
|
@ -151,7 +151,7 @@ default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1043
|
||||||
default CONFIG_STACK_SIZE = 8 * 1024
|
default CONFIG_STACK_SIZE = 8 * 1024
|
||||||
default CONFIG_HEAP_SIZE = 256 * 1024
|
default CONFIG_HEAP_SIZE = 256 * 1024
|
||||||
# More 1M for pgtbl.
|
# More 1M for pgtbl.
|
||||||
default CONFIG_LB_MEM_TOPK = 32768
|
default CONFIG_RAMTOP = 32768*1024
|
||||||
# to 1MB
|
# to 1MB
|
||||||
default CONFIG_RAMBASE = 0x1F00000
|
default CONFIG_RAMBASE = 0x1F00000
|
||||||
default CONFIG_USE_OPTION_TABLE = 0
|
default CONFIG_USE_OPTION_TABLE = 0
|
||||||
|
|
|
@ -40,7 +40,7 @@ int add_mainboard_resources(struct lb_memory *mem)
|
||||||
|
|
||||||
#if CONFIG_HAVE_ACPI_RESUME == 1
|
#if CONFIG_HAVE_ACPI_RESUME == 1
|
||||||
lb_add_memory_range(mem, LB_MEM_RESERVED,
|
lb_add_memory_range(mem, LB_MEM_RESERVED,
|
||||||
CONFIG_RAMBASE, ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_RAMBASE));
|
CONFIG_RAMBASE, ((CONFIG_RAMTOP) - CONFIG_RAMBASE));
|
||||||
lb_add_memory_range(mem, LB_MEM_RESERVED,
|
lb_add_memory_range(mem, LB_MEM_RESERVED,
|
||||||
CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE);
|
CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE);
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -105,7 +105,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -135,7 +135,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -89,7 +89,7 @@ static void post_code(uint8_t value) {
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -105,7 +105,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -136,7 +136,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Set-up automatic fan control
|
## Set-up automatic fan control
|
||||||
|
|
|
@ -87,7 +87,7 @@ static void post_code(uint8_t value) {
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -102,7 +102,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_USE_PRINTK_IN_CAR
|
uses CONFIG_USE_PRINTK_IN_CAR
|
||||||
|
|
||||||
|
@ -121,7 +121,7 @@ default CONFIG_ROM_SIZE=524288
|
||||||
default CONFIG_FALLBACK_SIZE=CONFIG_ROM_IMAGE_SIZE
|
default CONFIG_FALLBACK_SIZE=CONFIG_ROM_IMAGE_SIZE
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -35,7 +35,7 @@ uses CONFIG_ROM_SECTION_SIZE
|
||||||
uses CONFIG_ROM_SECTION_OFFSET
|
uses CONFIG_ROM_SECTION_OFFSET
|
||||||
uses CONFIG_ROM_PAYLOAD
|
uses CONFIG_ROM_PAYLOAD
|
||||||
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
|
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
uses CONFIG_ROMBASE
|
uses CONFIG_ROMBASE
|
||||||
uses CONFIG_XIP_ROM_SIZE
|
uses CONFIG_XIP_ROM_SIZE
|
||||||
uses CONFIG_XIP_ROM_BASE
|
uses CONFIG_XIP_ROM_BASE
|
||||||
|
@ -157,9 +157,9 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_RAMBASE=0x00100000
|
default CONFIG_RAMBASE=0x00100000
|
||||||
|
|
||||||
##
|
##
|
||||||
## in order to have coreboot running at 0x100000, TOPK has to be set
|
## in order to have coreboot running at 0x100000, RAMTOP has to be set
|
||||||
##
|
##
|
||||||
default CONFIG_LB_MEM_TOPK = 2*1024*1024
|
default CONFIG_RAMTOP = 2*1024*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Load the payload from the ROM
|
## Load the payload from the ROM
|
||||||
|
|
|
@ -80,7 +80,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -109,7 +109,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x02000
|
default CONFIG_FAILOVER_SIZE=0x02000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -99,9 +99,6 @@ uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
||||||
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
|
||||||
|
|
||||||
|
|
||||||
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
||||||
## ---> 512 Kbytes
|
## ---> 512 Kbytes
|
||||||
default CONFIG_ROM_SIZE=(512*1024)
|
default CONFIG_ROM_SIZE=(512*1024)
|
||||||
|
|
|
@ -91,7 +91,7 @@ uses CONFIG_ENABLE_APIC_EXT_ID
|
||||||
uses CONFIG_APIC_ID_OFFSET
|
uses CONFIG_APIC_ID_OFFSET
|
||||||
uses CONFIG_LIFT_BSP_APIC_ID
|
uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
uses CONFIG_MEM_TRAIN_SEQ
|
uses CONFIG_MEM_TRAIN_SEQ
|
||||||
uses CONFIG_WAIT_BEFORE_CPUS_INIT
|
uses CONFIG_WAIT_BEFORE_CPUS_INIT
|
||||||
|
@ -100,7 +100,7 @@ uses CONFIG_USE_PRINTK_IN_CAR
|
||||||
default CONFIG_ROM_SIZE = 512 * 1024
|
default CONFIG_ROM_SIZE = 512 * 1024
|
||||||
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE = 4 * 1024
|
default CONFIG_FAILOVER_SIZE = 4 * 1024
|
||||||
default CONFIG_LB_MEM_TOPK = 2048 # 1MB more for pgtbl.
|
default CONFIG_RAMTOP = 2048*1024 # 1MB more for pgtbl.
|
||||||
default CONFIG_HAVE_FALLBACK_BOOT = 1
|
default CONFIG_HAVE_FALLBACK_BOOT = 1
|
||||||
default CONFIG_HAVE_FAILOVER_BOOT = 1
|
default CONFIG_HAVE_FAILOVER_BOOT = 1
|
||||||
default CONFIG_HAVE_HARD_RESET = 1
|
default CONFIG_HAVE_HARD_RESET = 1
|
||||||
|
|
|
@ -63,7 +63,7 @@ void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE -
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE -
|
||||||
CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); /* in CACHE */
|
CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); /* in CACHE */
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK << 10) -
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) -
|
||||||
CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); /* in RAM */
|
CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); /* in RAM */
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -101,7 +101,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
uses CONFIG_USE_PRINTK_IN_CAR
|
uses CONFIG_USE_PRINTK_IN_CAR
|
||||||
|
|
||||||
###
|
###
|
||||||
|
@ -118,7 +118,7 @@ default CONFIG_ROM_SIZE=524288
|
||||||
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -103,7 +103,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -133,7 +133,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -87,7 +87,7 @@ static void post_code(uint8_t value) {
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -104,7 +104,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -137,7 +137,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -95,7 +95,7 @@ static inline unsigned get_nodes(void)
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -102,7 +102,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -130,7 +130,7 @@ default CONFIG_FALLBACK_SIZE=CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -95,7 +95,7 @@ static inline unsigned get_nodes(void)
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -99,7 +99,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_UNCOMPRESSED
|
uses CONFIG_UNCOMPRESSED
|
||||||
|
|
||||||
|
@ -132,7 +132,7 @@ default CONFIG_FALLBACK_SIZE=CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x02000
|
default CONFIG_FAILOVER_SIZE=0x02000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=16384
|
default CONFIG_RAMTOP=16384*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -95,7 +95,7 @@ static inline unsigned get_nodes(void)
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -68,8 +68,6 @@ uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
||||||
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
|
||||||
|
|
||||||
###
|
###
|
||||||
### Build options
|
### Build options
|
||||||
###
|
###
|
||||||
|
|
|
@ -77,8 +77,6 @@ uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
||||||
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
|
||||||
|
|
||||||
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
||||||
default CONFIG_ROM_SIZE=512*1024
|
default CONFIG_ROM_SIZE=512*1024
|
||||||
|
|
||||||
|
|
|
@ -71,8 +71,6 @@ uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
||||||
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
|
||||||
|
|
||||||
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
||||||
default CONFIG_ROM_SIZE=1024*1024
|
default CONFIG_ROM_SIZE=1024*1024
|
||||||
|
|
||||||
|
|
|
@ -80,7 +80,7 @@ uses CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
uses CONFIG_SB_HT_CHAIN_ON_BUS0
|
||||||
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
|
||||||
default CONFIG_ROM_SIZE=1024*1024
|
default CONFIG_ROM_SIZE=1024*1024
|
||||||
|
@ -95,7 +95,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -103,7 +103,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_AP_CODE_IN_CAR
|
uses CONFIG_AP_CODE_IN_CAR
|
||||||
|
|
||||||
|
@ -133,7 +133,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=2048
|
default CONFIG_RAMTOP=2048*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -76,7 +76,7 @@
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -101,7 +101,7 @@ uses CONFIG_LIFT_BSP_APIC_ID
|
||||||
|
|
||||||
uses CONFIG_PCI_64BIT_PREF_MEM
|
uses CONFIG_PCI_64BIT_PREF_MEM
|
||||||
|
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
|
|
||||||
uses CONFIG_PCI_BUS_SEGN_BITS
|
uses CONFIG_PCI_BUS_SEGN_BITS
|
||||||
|
|
||||||
|
@ -135,7 +135,7 @@ default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||||
default CONFIG_FAILOVER_SIZE=0x01000
|
default CONFIG_FAILOVER_SIZE=0x01000
|
||||||
|
|
||||||
#more 1M for pgtbl
|
#more 1M for pgtbl
|
||||||
default CONFIG_LB_MEM_TOPK=16384
|
default CONFIG_RAMTOP=16384*1024
|
||||||
|
|
||||||
##
|
##
|
||||||
## Build code for the fallback boot
|
## Build code for the fallback boot
|
||||||
|
|
|
@ -76,7 +76,7 @@
|
||||||
void hardwaremain(int ret_addr)
|
void hardwaremain(int ret_addr)
|
||||||
{
|
{
|
||||||
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE
|
||||||
struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
|
|
||||||
struct node_core_id id;
|
struct node_core_id id;
|
||||||
|
|
||||||
|
|
|
@ -34,7 +34,7 @@ uses CONFIG_MAINBOARD_VENDOR
|
||||||
uses CONFIG_MAINBOARD_PART_NUMBER
|
uses CONFIG_MAINBOARD_PART_NUMBER
|
||||||
uses COREBOOT_EXTRA_VERSION
|
uses COREBOOT_EXTRA_VERSION
|
||||||
uses CONFIG_ARCH
|
uses CONFIG_ARCH
|
||||||
uses CONFIG_LB_MEM_TOPK
|
uses CONFIG_RAMTOP
|
||||||
uses CONFIG_FALLBACK_SIZE
|
uses CONFIG_FALLBACK_SIZE
|
||||||
uses CONFIG_STACK_SIZE
|
uses CONFIG_STACK_SIZE
|
||||||
uses CONFIG_HEAP_SIZE
|
uses CONFIG_HEAP_SIZE
|
||||||
|
@ -73,7 +73,7 @@ uses CONFIG_EPIA_VT8237R_INIT
|
||||||
uses CONFIG_HAVE_MAINBOARD_RESOURCES
|
uses CONFIG_HAVE_MAINBOARD_RESOURCES
|
||||||
|
|
||||||
default CONFIG_EPIA_VT8237R_INIT = 1
|
default CONFIG_EPIA_VT8237R_INIT = 1
|
||||||
#default CONFIG_LB_MEM_TOPK = 4 * 1024
|
#default CONFIG_RAMTOP = 4 * 1024*1024
|
||||||
default CONFIG_ROM_SIZE = 512 * 1024
|
default CONFIG_ROM_SIZE = 512 * 1024
|
||||||
default CONFIG_COMPRESS = 1
|
default CONFIG_COMPRESS = 1
|
||||||
default CONFIG_IOAPIC = 1
|
default CONFIG_IOAPIC = 1
|
||||||
|
|
|
@ -134,7 +134,7 @@ unsigned long acpi_fill_slit(unsigned long current)
|
||||||
/* fill the first 8 byte with that num */
|
/* fill the first 8 byte with that num */
|
||||||
/* fill the next num*num byte with distance, local is 10, 1 hop mean 20, and 2 hop with 30.... */
|
/* fill the next num*num byte with distance, local is 10, 1 hop mean 20, and 2 hop with 30.... */
|
||||||
|
|
||||||
struct sys_info *sysinfox = (struct sys_info *)((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
|
struct sys_info *sysinfox = (struct sys_info *)((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
|
||||||
u8 *ln = sysinfox->ln;
|
u8 *ln = sysinfox->ln;
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -806,7 +806,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int i)
|
||||||
u32 hole_sizek;
|
u32 hole_sizek;
|
||||||
|
|
||||||
u32 one_DCT;
|
u32 one_DCT;
|
||||||
struct sys_info *sysinfox = (struct sys_info *)((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = (struct sys_info *)((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
struct mem_info *meminfo;
|
struct mem_info *meminfo;
|
||||||
meminfo = &sysinfox->meminfo[i];
|
meminfo = &sysinfox->meminfo[i];
|
||||||
|
|
||||||
|
@ -1065,7 +1065,7 @@ static void pci_domain_set_resources(device_t dev)
|
||||||
#if CONFIG_AMDMCT == 0
|
#if CONFIG_AMDMCT == 0
|
||||||
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
|
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
|
||||||
if(reset_memhole) {
|
if(reset_memhole) {
|
||||||
struct sys_info *sysinfox = (struct sys_info *)((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
struct sys_info *sysinfox = (struct sys_info *)((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM
|
||||||
struct mem_info *meminfo;
|
struct mem_info *meminfo;
|
||||||
meminfo = &sysinfox->meminfo[i];
|
meminfo = &sysinfox->meminfo[i];
|
||||||
sizek += hoist_memory(mmio_basek,i, get_one_DCT(meminfo), sysconf.nodes);
|
sizek += hoist_memory(mmio_basek,i, get_one_DCT(meminfo), sysconf.nodes);
|
||||||
|
|
|
@ -11,8 +11,8 @@
|
||||||
#include "raminit.h"
|
#include "raminit.h"
|
||||||
#include "amdk8.h"
|
#include "amdk8.h"
|
||||||
|
|
||||||
#if (CONFIG_LB_MEM_TOPK & (CONFIG_LB_MEM_TOPK -1)) != 0
|
#if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0
|
||||||
# error "CONFIG_LB_MEM_TOPK must be a power of 2"
|
# error "CONFIG_RAMTOP must be a power of 2"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef QRANK_DIMM_SUPPORT
|
#ifndef QRANK_DIMM_SUPPORT
|
||||||
|
|
|
@ -48,8 +48,8 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
#if (CONFIG_LB_MEM_TOPK & (CONFIG_LB_MEM_TOPK -1)) != 0
|
#if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0
|
||||||
# error "CONFIG_LB_MEM_TOPK must be a power of 2"
|
# error "CONFIG_RAMTOP must be a power of 2"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include "amdk8_f_pci.c"
|
#include "amdk8_f_pci.c"
|
||||||
|
|
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@ -2096,7 +2096,7 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr);
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||||||
static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sys_info *sysinfo, unsigned retcall)
|
static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sys_info *sysinfo, unsigned retcall)
|
||||||
{
|
{
|
||||||
if(coreid) return; // only do it on core0
|
if(coreid) return; // only do it on core0
|
||||||
struct sys_info *sysinfox = (void*)((CONFIG_LB_MEM_TOPK<<10) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
|
struct sys_info *sysinfox = (void*)((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
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||||||
wait_till_sysinfo_in_ram(); // use pci to get it
|
wait_till_sysinfo_in_ram(); // use pci to get it
|
||||||
|
|
||||||
if(sysinfox->mem_trained[nodeid] == 0x80) {
|
if(sysinfox->mem_trained[nodeid] == 0x80) {
|
||||||
|
|
|
@ -45,7 +45,7 @@ void usbdebug_direct_ram_tx_byte(unsigned char data)
|
||||||
|
|
||||||
/* "Find" dbg_info structure in RAM */
|
/* "Find" dbg_info structure in RAM */
|
||||||
dbg_info = (struct ehci_debug_info *)
|
dbg_info = (struct ehci_debug_info *)
|
||||||
((CONFIG_LB_MEM_TOPK << 10) - sizeof(struct ehci_debug_info));
|
((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info));
|
||||||
|
|
||||||
if (dbg_info->ehci_debug) {
|
if (dbg_info->ehci_debug) {
|
||||||
dbgp_bulk_write_x(dbg_info, &data, 1);
|
dbgp_bulk_write_x(dbg_info, &data, 1);
|
||||||
|
|
Loading…
Reference in New Issue