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drivers/pc80/rtc: Drop CMOS_POST_EXTRA option 

Change-Id: I379a5664776624600ff1c2919bffa77c877d87ab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2020-01-04 16:15:50 +02:00 committed by Patrick Georgi
parent f3dbf4ce6b
commit 101f454596
5 changed files with 4 additions and 22 deletions
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1
configs/config.google_meep_cros
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@ -14,7 +14,6 @@ CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN=y
# Event Logging # Event Logging
CONFIG_CMOS_POST=y CONFIG_CMOS_POST=y
CONFIG_CMOS_POST_EXTRA=y
CONFIG_CMOS_POST_OFFSET=0x70 CONFIG_CMOS_POST_OFFSET=0x70
CONFIG_COLLECT_TIMESTAMPS=y CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_ELOG=y CONFIG_ELOG=y

1
configs/config.google_reef_cros
View File

@ -10,5 +10,4 @@ CONFIG_SPI_FLASH_SMM=y
# CONFIG_CONSOLE_SERIAL is not set # CONFIG_CONSOLE_SERIAL is not set
CONFIG_CMOS_POST=y CONFIG_CMOS_POST=y
CONFIG_CMOS_POST_OFFSET=0x70 CONFIG_CMOS_POST_OFFSET=0x70
CONFIG_CMOS_POST_EXTRA=y
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y

8
src/console/Kconfig
View File

@ -392,14 +392,6 @@ config CMOS_POST_OFFSET
If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
defined in the mainboard option table. defined in the mainboard option table.
config CMOS_POST_EXTRA
bool "Store extra logging info into CMOS"
depends on CMOS_POST
default n
help
This will enable extra logging of work that happens between post
codes into CMOS for debug. This uses an additional 8 bytes of CMOS.
config CONSOLE_POST config CONSOLE_POST
bool "Show POST codes on the debug console" bool "Show POST codes on the debug console"
depends on !NO_POST depends on !NO_POST

1
src/drivers/elog/elog.c
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@ -765,7 +765,6 @@ static void log_last_boot_post(void)
"in previous boot: 0x%02x/0x%04x\n", code, extra); "in previous boot: 0x%02x/0x%04x\n", code, extra);
elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code); elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
/* Always zero with !CMOS_POST_EXTRA. */
if (extra) if (extra)
elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra); elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra);
#endif #endif

7
src/drivers/pc80/rtc/post.c
View File

@ -20,12 +20,10 @@ int cmos_post_previous_boot(u8 *code, u32 *extra)
switch (cmos_read(CMOS_POST_BANK_OFFSET)) { switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
case CMOS_POST_BANK_0_MAGIC: case CMOS_POST_BANK_0_MAGIC:
*code = cmos_read(CMOS_POST_BANK_1_OFFSET); *code = cmos_read(CMOS_POST_BANK_1_OFFSET);
if (CONFIG(CMOS_POST_EXTRA))
*extra = cmos_read32(CMOS_POST_BANK_1_EXTRA); *extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
break; break;
case CMOS_POST_BANK_1_MAGIC: case CMOS_POST_BANK_1_MAGIC:
*code = cmos_read(CMOS_POST_BANK_0_OFFSET); *code = cmos_read(CMOS_POST_BANK_0_OFFSET);
if (CONFIG(CMOS_POST_EXTRA))
*extra = cmos_read32(CMOS_POST_BANK_0_EXTRA); *extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
break; break;
} }
@ -61,11 +59,9 @@ void cmos_post_init(void)
/* Initialize to zero */ /* Initialize to zero */
cmos_write(0, CMOS_POST_BANK_0_OFFSET); cmos_write(0, CMOS_POST_BANK_0_OFFSET);
cmos_write(0, CMOS_POST_BANK_1_OFFSET); cmos_write(0, CMOS_POST_BANK_1_OFFSET);
if (CONFIG(CMOS_POST_EXTRA)) {
cmos_write32(0, CMOS_POST_BANK_0_EXTRA); cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
cmos_write32(0, CMOS_POST_BANK_1_EXTRA); cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
} }
}
cmos_write(magic, CMOS_POST_BANK_OFFSET); cmos_write(magic, CMOS_POST_BANK_OFFSET);
} }
@ -88,9 +84,6 @@ void cmos_post_code(u8 value)
void cmos_post_extra(u32 value) void cmos_post_extra(u32 value)
{ {
if (!CONFIG(CMOS_POST_EXTRA))
return;
spin_lock(&cmos_post_lock); spin_lock(&cmos_post_lock);
switch (cmos_read(CMOS_POST_BANK_OFFSET)) { switch (cmos_read(CMOS_POST_BANK_OFFSET)) {