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soc/intel: Add some missing MCH PCIe IDs 

These are documented in the Intel Datasheet entitled

"6th Generation Intel® Processor Datasheet for S-Platforms"
"6th Generation Intel® Processor Datasheet for H-Platforms" (Volume 2)

Without them, coreboot fails to properly inform the payload of the
amount of available memory.

Signed-off-by: Keno Fischer <keno@juliacomputing.com>
Change-Id: I5b810c6415c4aa0404e5fa318d2c8db292566b8a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33286
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Keno Fischer 2019-06-07 01:55:56 -04:00 committed by Felix Held
parent 55c5777170
commit 1044ebaa06
3 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/include/device/pci_ids.h
View File

@ -3076,7 +3076,10 @@
#define PCI_DEVICE_ID_INTEL_SKL_ID_U 0x1904 #define PCI_DEVICE_ID_INTEL_SKL_ID_U 0x1904
#define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c #define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c
#define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924 #define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924
#define PCI_DEVICE_ID_INTEL_SKL_ID_H_2 0x1900
#define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910 #define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910
#define PCI_DEVICE_ID_INTEL_SKL_ID_S_2 0x190f
#define PCI_DEVICE_ID_INTEL_SKL_ID_S_4 0x191f
#define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f #define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f
#define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918 #define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918
#define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f #define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f

3
src/soc/intel/common/block/systemagent/systemagent.c
View File

@ -341,6 +341,9 @@ static const unsigned short systemagent_ids[] = {
PCI_DEVICE_ID_INTEL_SKL_ID_Y, PCI_DEVICE_ID_INTEL_SKL_ID_Y,
PCI_DEVICE_ID_INTEL_SKL_ID_ULX, PCI_DEVICE_ID_INTEL_SKL_ID_ULX,
PCI_DEVICE_ID_INTEL_SKL_ID_H, PCI_DEVICE_ID_INTEL_SKL_ID_H,
PCI_DEVICE_ID_INTEL_SKL_ID_H_2,
PCI_DEVICE_ID_INTEL_SKL_ID_S_2,
PCI_DEVICE_ID_INTEL_SKL_ID_S_4,
PCI_DEVICE_ID_INTEL_WHL_ID_Wx2, PCI_DEVICE_ID_INTEL_WHL_ID_Wx2,
PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, PCI_DEVICE_ID_INTEL_WHL_ID_Wx4,
PCI_DEVICE_ID_INTEL_KBL_ID_S, PCI_DEVICE_ID_INTEL_KBL_ID_S,

3
src/soc/intel/skylake/bootblock/report_platform.c
View File

@ -53,6 +53,9 @@ static struct {
{ PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" },
{ PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" },
{ PCI_DEVICE_ID_INTEL_SKL_ID_DT, "Skylake-DT" }, { PCI_DEVICE_ID_INTEL_SKL_ID_DT, "Skylake-DT" },
{ PCI_DEVICE_ID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" },
{ PCI_DEVICE_ID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" },
{ PCI_DEVICE_ID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core)" },
{ PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" },
{ PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"},
{ PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" },