mb/google/rex: Enable SoundWire codecs

Enable drivers for SoundWire codecs and define the topology in
the devicetree for the rex0 variant with the SoundWire daughter
board connected.

+------------------+         +--------------------+
|                  |         | Headphone Codec    |
| Intel Meteor Lake|    +--->|Cirrus Logic CS42L42|
|     SoundWire    |    |    |       ID 0         |
|     Controller   |    |    +--------------------+
|                  |    |
|           Link 0 +----+    +-------------------+
|                  |         | Left Speaker Amp  |
|           Link 1 |    +--->| Maxim MAX98363    |
|                  |    |    |       ID 0        |
|           Link 2 +----|    +-------------------+
|                  |    |
|           Link 3 |    |    +-------------------+
|                  |    |    | Right Speaker Amp |
+------------------+    +--->| Maxim MAX98363    |
                             |       ID 1        |
                             +-------------------+

This was tested by booting the firmware and dumping the SSDT table
to ensure that all SoundWire ACPI devices are created as expected with
the properties that are defined in coreboot under \_SB.PCI0:

HDAS           - Intel Meteor Lake HDA PCI device
HDAS.SNDW      - Intel Meteor Lake SoundWire Controller
HDAS.SNDW.SW00 - Cirrus Logic CS42L42 - Headphone Codec
HDAS.SNDW.SW20 - Maxim MAX98363  - Left Speaker Amp
HDAS.SNDW.SW21 - Maxim MAX98363  - Right Speaker Amp

BUG=b:269497731
TEST=Verified SSDT for SNDW in the OS. Playback and recording are also
validated on google/rex.

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I3e11dc642ff686ba7da23ed76332f7f10e60fade
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73280
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kapil Porwal 2023-02-25 22:30:21 +05:30 committed by Felix Held
parent 74a986db9f
commit 104567425c
3 changed files with 39 additions and 1 deletions

View File

@ -7,7 +7,6 @@ config BOARD_GOOGLE_REX_COMMON
select DRIVERS_INTEL_DPTF
select DRIVERS_INTEL_DPTF_SUPPORTS_TPCH
select DRIVERS_INTEL_USB4_RETIMER
select DRIVERS_SOUNDWIRE_ALC5682
select DRIVERS_WIFI_GENERIC
select DRIVERS_INTEL_MIPI_CAMERA
select DRIVERS_SPI_ACPI

View File

@ -4,6 +4,9 @@ config BOARD_GOOGLE_REX0
bool "-> Rex 0"
select BOARD_GOOGLE_BASEBOARD_REX
select DRIVERS_GENESYSLOGIC_GL9755
select DRIVERS_INTEL_SOUNDWIRE
select DRIVERS_SOUNDWIRE_CS42L42
select DRIVERS_SOUNDWIRE_MAX98363
config BOARD_GOOGLE_SCREEBO
bool "-> Screebo"
@ -14,3 +17,6 @@ config BOARD_GOOGLE_REX_EC_ISH
select BOARD_GOOGLE_BASEBOARD_REX
select DRIVERS_GENESYSLOGIC_GL9755
select DRIVERS_INTEL_ISH
select DRIVERS_INTEL_SOUNDWIRE
select DRIVERS_SOUNDWIRE_CS42L42
select DRIVERS_SOUNDWIRE_MAX98363

View File

@ -767,6 +767,39 @@ chip soc/intel/meteorlake
probe AUDIO MAX98360_ALC5682I_I2S
end
end
chip drivers/intel/soundwire
device generic 0 on
probe AUDIO MAX98363_CS42L42_SNDW
chip drivers/soundwire/cs42l42
# SoundWire Link 0 ID 0
register "desc" = ""Headset Codec""
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B07)"
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_B06)"
register "ts_inv" = "true"
register "ts_dbnc_rise" = "RISE_DEB_1000_MS"
register "ts_dbnc_fall" = "FALL_DEB_0_MS"
register "btn_det_init_dbnce" = "100"
register "btn_det_event_dbnce" = "10"
register "bias_lvls[0]" = "15"
register "bias_lvls[1]" = "8"
register "bias_lvls[2]" = "4"
register "bias_lvls[3]" = "1"
register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW"
register "hs_bias_sense_disable" = "true"
device generic 0.0 on end
end
chip drivers/soundwire/max98363
# SoundWire Link 2 ID 0
register "desc" = ""Left Speaker Amp""
device generic 2.0 on end
end
chip drivers/soundwire/max98363
# SoundWire Link 2 ID 1
register "desc" = ""Right Speaker Amp""
device generic 2.1 on end
end
end
end
end
end
end