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intel/kunimitsu: fix kepler probing 

The patch was ported from commit: glados: fix kepler probing

BUG=chrome-os-partner:44326
BRANCH=None
TEST=Built and booted kunimitsu. lscpi shows the device on bus 2.

Change-Id: I423e5d8414cb9864f6ff2f2ce7cd925baeb242eb
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: 37bf5b7594a6784b3acb65410c670300e582e7aa
Original-Original-change-Id: I7fe4a707f9321b7bdec4b4be729c5d0dcce65f6e
Original-Originally-signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Originally-reviewed-on: https://chromium-review.googlesource.com/294810
Original-Change-Id: I2fb620ebff5b477a1a457a354c65229ad1092cae
Original-Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/295164
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11431
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Wenkai Du 2015-08-21 13:11:00 -07:00 committed by Patrick Georgi
parent a0f515354b
commit 1105fad6ea
2 changed files with 19 additions and 0 deletions
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8
src/mainboard/intel/kunimitsu/gpio.h
View File

@ -23,6 +23,7 @@
#include <soc/gpio.h>
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
/* EC_PCH_RCIN */ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
/* LPC_LAD_0 */ PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
@ -189,4 +190,11 @@ static const struct pad_config gpio_table[] = {
/* PM_SLP_S5# */ PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
/* LANPHYC */ /* GPD11 */
};
/* Early pad configuration in romstage. */
static const struct pad_config early_gpio_table[] = {
/* SRCCLKREQ2# */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* KEPLER */
/* UART0_CTS# */ PAD_CFG_GPO(GPP_C11, 1, DEEP), /* EN_PP3300_KEPLER */
};
#endif

11
src/mainboard/intel/kunimitsu/romstage.c
View File

@ -29,11 +29,22 @@
#include <soc/pei_wrapper.h>
#include <soc/pm.h>
#include <soc/romstage.h>
#include "gpio.h"
#include "spd/spd.h"
static void early_config_gpio(void)
{
/* This is a hack for FSP because it does things in MemoryInit()
* which it shouldn't be. We have to prepare certain gpios here
* because of the brokenness in FSP. */
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}
void mainboard_romstage_entry(struct romstage_params *params)
{
post_code(0x31);
early_config_gpio();
/* Fill out PEI DATA */
mainboard_fill_pei_data(params->pei_data);
mainboard_fill_spd_data(params->pei_data);