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AGESA: Cleanup ACPI S3 support

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Due to low-memory corruptions S3 support has now been
(at least temporarily) removed from AGESA platfroms.
Should we bring it back one day, CAR teardown on S3 path
will happen with an empty stack so ugly backup/recovery
of the stack will no longer be used.

If S3 feature is brought back, resume path code for FCH
will also see partial rewrite and agesawrapper.c file
will not be part of that.

Change-Id: Ib38c04d0e74f600e0b719940d5e2530f4c726cfd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20899
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-07-18 00:57:37 +03:00
parent cd7578030b
commit 111926a166
6 changed files with 0 additions and 136 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

42
src/cpu/amd/agesa/s3_resume.c
View file

@ -27,30 +27,6 @@
#include "s3_resume.h"
#include <northbridge/amd/agesa/agesa_helper.h>
static void move_stack_high_mem(void)
{
uintptr_t high_stack = romstage_ram_stack_base(HIGH_ROMSTAGE_STACK_SIZE,
ROMSTAGE_STACK_CBMEM);
if (!high_stack)
halt();
/* TODO: Make the switch with empty stack instead. */
memcpy((void*)high_stack, (void *)BSP_STACK_BASE_ADDR, HIGH_ROMSTAGE_STACK_SIZE);
/* TODO: We only switch stack on BSP. */
#ifdef __x86_64__
__asm__
volatile ("add %0, %%rsp; add %0, %%rbp; invd"::"g"
(high_stack - BSP_STACK_BASE_ADDR)
:);
#else
__asm__
volatile ("add %0, %%esp; add %0, %%ebp; invd"::"g"
(high_stack - BSP_STACK_BASE_ADDR)
:);
#endif
}
void set_resume_cache(void)
{
msr_t msr;
@ -75,21 +51,3 @@ void set_resume_cache(void)
enable_cache();
}
void prepare_for_resume(void)
{
if (cbmem_recovery(1)) {
printk(BIOS_EMERG, "Unable to recover CBMEM\n");
halt();
}
post_code(0x62);
printk(BIOS_DEBUG, "Move CAR stack.\n");
move_stack_high_mem();
post_code(0x63);
disable_cache_as_ram();
printk(BIOS_DEBUG, "CAR disabled.\n");
set_resume_cache();
}

5
src/northbridge/amd/agesa/family15tn/state_machine.c
View file

@ -63,8 +63,6 @@ void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late)
void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late)
{
amd_initcpuio();
fchs3earlyrestore();
}
void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid)
@ -74,9 +72,6 @@ void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid)
void platform_AfterInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late)
{
/* FIXME: not reached S3 path */
if (cb->s3resume)
fchs3laterestore();
}
void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save)

5
src/northbridge/amd/agesa/family16kb/state_machine.c
View file

@ -63,8 +63,6 @@ void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late)
void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late)
{
amd_initcpuio();
fchs3earlyrestore();
}
void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid)
@ -74,9 +72,6 @@ void platform_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *Mid)
void platform_AfterInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late)
{
/* FIXME: not reached S3 path */
if (cb->s3resume)
fchs3laterestore();
}
void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save)

4
src/northbridge/amd/agesa/state_machine.h
View file

@ -38,10 +38,6 @@ AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock);
AGESA_STATUS OemS3Save(AMD_S3_PARAMS *dataBlock);
#endif
/* For FCH */
static inline void fchs3earlyrestore(void) { }
static inline void fchs3laterestore(void) { }
struct sysinfo
{
AMD_CONFIG_PARAMS StdHeader;

2
src/southbridge/amd/agesa/hudson/Makefile.inc
View file

@ -10,8 +10,6 @@ ramstage-y += pci.c
ramstage-y += pcie.c
ramstage-y += sd.c
ramstage-$(CONFIG_AGESA_LEGACY_WRAPPER) += agesawrapper.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c

78
src/southbridge/amd/agesa/hudson/agesawrapper.c
View file

@ -1,78 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdint.h>
#include <string.h>
#include <cpu/x86/mtrr.h>
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include "cpuRegisters.h"
#include "cpuCacheInit.h"
#include "cpuApicUtilities.h"
#include "cpuEarlyInit.h"
#include "cpuLateInit.h"
#include "Dispatcher.h"
#include "cpuCacheInit.h"
#include "amdlib.h"
#include "Filecode.h"
#include "heapManager.h"
#include "FchPlatform.h"
#include "Fch.h"
#include <arch/io.h>
#include <device/device.h>
#include "hudson.h"
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
#error Use of GetHeapBase() is incorrect or at least suspicious
#endif
AGESA_STATUS agesawrapper_fchs3earlyrestore (void)
{
FCH_DATA_BLOCK FchParams;
AMD_CONFIG_PARAMS StdHeader;
StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
StdHeader.HeapBasePtr = (uintptr_t) GetHeapBase() + 0x10;
StdHeader.AltImageBasePtr = 0;
StdHeader.CalloutPtr = &GetBiosCallout;
StdHeader.Func = 0;
StdHeader.ImageBasePtr = 0;
FchParams.StdHeader = &StdHeader;
s3_resume_init_data(&FchParams);
FchInitS3EarlyRestore(&FchParams);
return AGESA_SUCCESS;
}
AGESA_STATUS agesawrapper_fchs3laterestore (void)
{
FCH_DATA_BLOCK FchParams;
AMD_CONFIG_PARAMS StdHeader;
StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
StdHeader.HeapBasePtr = (uintptr_t) GetHeapBase() + 0x10;
StdHeader.AltImageBasePtr = 0;
StdHeader.CalloutPtr = &GetBiosCallout;
StdHeader.Func = 0;
StdHeader.ImageBasePtr = 0;
FchParams.StdHeader = &StdHeader;
s3_resume_init_data(&FchParams);
FchInitS3LateRestore(&FchParams);
return AGESA_SUCCESS;
}