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mb/intel/jasperlake_rvp: Configure GPIO pad to enable I2C4 

Includes changes related to GPIO pad to configure I2C4 required for UFC

Change-Id: Ica3ac31f10214b8aff3bb64a2c3b42ccfa28bdcd
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
This commit is contained in:
Sugnan Prabhu S 2020-08-21 18:13:10 +05:30 committed by Patrick Georgi
parent 65993e8233
commit 149b2dcb46
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/intel/jasperlake_rvp/mainboard.c
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@ -3,10 +3,14 @@
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <device/device.h>
#include <intelblocks/pcr.h>
#include <soc/gpio.h>
#include <soc/pcr_ids.h>
#include <smbios.h>
#include <vendorcode/google/chromeos/chromeos.h>
#define SERIAL_IO_PCR_GPPRVRW4 0x60C
static void mainboard_init(void *chip_info)
{
const struct pad_config *pads;
@ -14,6 +18,9 @@ static void mainboard_init(void *chip_info)
pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);
if (CONFIG(DRIVERS_INTEL_MIPI_CAMERA))
pcr_write32(PID_SERIALIO, SERIAL_IO_PCR_GPPRVRW4, BIT8);
}
static void mainboard_enable(struct device *dev)