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mb/google/brya/var/agah: Update ASPM settings for dGPU 

After some debugging, it has been determined that the ASPM L0s substate
is functional, but there is still some problem with ASPM L1 substates,
so this patch updates ASPM status for the dGPU from disabled to L0s
only.

BUG=b:240390998
TEST=tested with nvidia tools

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I584bdbf26eda20246034263446492bf4daf5f3b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Tim Wawrzynczak 2022-07-27 09:56:41 -06:00 committed by Paul Fagerburg
parent d6b763ca63
commit 1523742d4c
2 changed files with 1 additions and 5 deletions
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2
src/mainboard/google/brya/variants/agah/overridetree.cb
View File

@ -80,7 +80,7 @@ chip soc/intel/alderlake
.clk_req = 0, .clk_req = 0,
.clk_src = 0, .clk_src = 0,
.flags = PCIE_RP_LTR | PCIE_RP_AER, .flags = PCIE_RP_LTR | PCIE_RP_AER,
.pcie_rp_aspm = ASPM_DISABLE .pcie_rp_aspm = ASPM_L0S,
}" }"
device pci 00.0 alias dgpu on end device pci 00.0 alias dgpu on end
end end

4
src/mainboard/google/brya/variants/agah/variant.c
View File

@ -132,10 +132,6 @@ static void dgpu_power_sequence_on(void)
void variant_init(void) void variant_init(void)
{ {
/* Disable ASPM for the GPU until it is verified working. */
struct device *dgpu = DEV_PTR(dgpu);
dgpu->disable_pcie_aspm = 1;
if (acpi_is_wakeup_s3()) if (acpi_is_wakeup_s3())
return; return;