commonlib: Add new "CSME ROM started execution" TS

BUG=b:182575295
TEST=Boot to OS, check cbmem -t

 990:CSME ROM started execution                        0
 944:CSE sent 'Boot Stall Done' to PMC                 80,408
 945:CSE started to handle ICC configuration           80,408 (0)
 946:CSE sent 'Host BIOS Prep Done' to PMC             82,408 (2,000)
 947:CSE received 'CPU Reset Done Ack sent' from PMC   242,408 (160,000)
   0:1st timestamp                                     331,797 (89,389)
  11:start of bootblock                                359,484 (27,686)
  12:end of bootblock                                  377,417 (17,932)

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I9e4ccd0b8c301e4eec1a09ee8919a577ade938ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Bora Guvendik 2022-01-14 17:00:45 -08:00 committed by Felix Held
parent e383b3dcc4
commit 1587324a0d
1 changed files with 5 additions and 1 deletions

View File

@ -122,7 +122,7 @@ enum timestamp_id {
TS_START_CSE_FW_SYNC = 948, TS_START_CSE_FW_SYNC = 948,
TS_END_CSE_FW_SYNC = 949, TS_END_CSE_FW_SYNC = 949,
/* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */ /* 950+ reserved for vendorcode extensions (950-989: intel/fsp) */
TS_FSP_MEMORY_INIT_START = 950, TS_FSP_MEMORY_INIT_START = 950,
TS_FSP_MEMORY_INIT_END = 951, TS_FSP_MEMORY_INIT_END = 951,
TS_FSP_TEMP_RAM_EXIT_START = 952, TS_FSP_TEMP_RAM_EXIT_START = 952,
@ -140,6 +140,9 @@ enum timestamp_id {
TS_FSP_MEMORY_INIT_LOAD = 970, TS_FSP_MEMORY_INIT_LOAD = 970,
TS_FSP_SILICON_INIT_LOAD = 971, TS_FSP_SILICON_INIT_LOAD = 971,
/* 990+ reserved for vendorcode extensions (990-999: Intel ME continued) */
TS_ME_ROM_START = 990,
/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */ /* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */
/* Depthcharge entry IDs start at 1000 */ /* Depthcharge entry IDs start at 1000 */
@ -283,6 +286,7 @@ static const struct timestamp_id_to_name {
{ TS_ME_RECEIVED_CRDA_FROM_PMC, "CSE received 'CPU Reset Done Ack sent' from PMC"}, { TS_ME_RECEIVED_CRDA_FROM_PMC, "CSE received 'CPU Reset Done Ack sent' from PMC"},
{ TS_START_CSE_FW_SYNC, "starting CSE firmware sync"}, { TS_START_CSE_FW_SYNC, "starting CSE firmware sync"},
{ TS_END_CSE_FW_SYNC, "finished CSE firmware sync"}, { TS_END_CSE_FW_SYNC, "finished CSE firmware sync"},
{ TS_ME_ROM_START, "CSME ROM started execution"},
/* FSP related timestamps */ /* FSP related timestamps */
{ TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" }, { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },