mb/asrock/h110m: configure GPIOs in SuperIO chip
Enables and configures GPIOs in the NCT6791D chip. The values for registers taken from the superiotool dump. Change-Id: I5968a6c20cc013697d64bfbe4fc2e7b2390b72b0 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35378 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -353,18 +353,39 @@ chip soc/intel/skylake
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irq 0x72 = 12 # Mouse
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end
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device pnp 2e.6 off end # CIR
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device pnp 2e.7 off end # GPIO6
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device pnp 2e.107 off end # GPIO7
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device pnp 2e.207 off end # GPIO8
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device pnp 2e.7 on # GPIO6
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irq 0xf6 = 0xff
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irq 0xf7 = 0xff
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irq 0xf8 = 0xff
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end
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device pnp 2e.107 on # GPIO7
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irq 0xe0 = 0x7f
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irq 0xe1 = 0x0d
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end
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device pnp 2e.207 on # GPIO8
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irq 0xe6 = 0xff
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irq 0xe7 = 0xff
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irq 0xed = 0xff
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end
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device pnp 2e.8 off end # WDT
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device pnp 2e.108 off end # GPIO0
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device pnp 2e.108 on end # GPIO0
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device pnp 2e.308 off end # GPIO base
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device pnp 2e.408 off end # WDTMEM
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device pnp 2e.708 off end # GPIO1
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device pnp 2e.9 off end # GPIO2
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device pnp 2e.109 off end # GPIO3
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device pnp 2e.209 off end # GPIO4
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device pnp 2e.309 off end # GPIO5
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device pnp 2e.708 on end # GPIO1
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device pnp 2e.9 on end # GPIO2
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device pnp 2e.109 on # GPIO3
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irq 0xe4 = 0x7b
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irq 0xe5 = 0x02
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irq 0xea = 0x04
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end
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device pnp 2e.209 on # GPIO4
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irq 0xf0 = 0x7f
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irq 0xf1 = 0x80
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end
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device pnp 2e.309 on # GPIO5
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irq 0xf4 = 0xdf
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irq 0xf5 = 0xd5
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end
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device pnp 2e.a on
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# Power RAM in S3 and let the PCH
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# handle power failure actions
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