skylake: Remove dead code
Remove dead code not called by any part of coreboot. BRANCH=none BUG=None TEST=Build and run on skylake Change-Id: I3d457a196d12d03340bceb444d1d6c95afef13df Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 58ea135813afeef773f37023fda58f36d544beef Original-Change-Id: Id8f4591f20d41f875348c6583618bbcaaf9d9a3a Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/294953 Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11544 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -33,7 +33,6 @@ void intel_early_me_status(void);
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void enable_smbus(void);
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int smbus_read_byte(unsigned device, unsigned address);
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int early_spi_read(u32 offset, u32 size, u8 *buffer);
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int early_spi_read_wpsr(u8 *sr);
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void mainboard_fill_spd_data(struct pei_data *pei_data);
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@ -21,26 +21,6 @@
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#include <soc/flash_controller.h>
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#include <soc/romstage.h>
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int early_spi_read(u32 offset, u32 size, u8 *buffer)
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{
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u32 current = 0;
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spi_init();
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while (size > 0) {
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u8 count = (size < 64) ? size : 64;
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/* sending NULL for spiflash struct parameter since we are not
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* calling HWSEQ read() call via Probe.
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*/
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if (pch_hwseq_read(NULL, offset + current, count,
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buffer + current) != 0)
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return -1;
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size -= count;
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current += count;
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}
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return 0;
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}
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/*
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* Minimal set of commands to read WPSR from SPI.
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* Returns 0 on success, < 0 on failure.
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