Add automatic SMBIOS table generation

Change-Id: I0ae16dda8969638a8f70fe1d2e29e992aef3a834
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/152
Tested-by: build bot (Jenkins)

Makefile.inc

@@ -127,6 +127,7 @@ $(obj)/build.h: .xcompile
 	printf "#define COREBOOT_VERSION \"$(KERNELVERSION)\"\n" >> $(obj)/build.ht
 	printf "#define COREBOOT_EXTRA_VERSION \"$(COREBOOT_EXTRA_VERSION)\"\n" >> $(obj)/build.ht
 	printf "#define COREBOOT_BUILD \"`LANG= date`\"\n" >> $(obj)/build.ht
+	printf "#define COREBOOT_DMI_DATE \"`LANG= date +"%m/%d/%Y"`\"\n" >> $(obj)/build.ht
 	printf "\n" >> $(obj)/build.ht
 	printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.ht
 	printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.ht

src/Kconfig

@@ -87,7 +87,7 @@ config SCONFIG_GENPARSER
 	help
 	  Enable this option if you are working on the sconfig
 	  device tree parser and made changes to sconfig.l and
-	  sconfig.y. 
+	  sconfig.y.
 	  Otherwise, say N.
 
 config USE_OPTION_TABLE
@@ -304,6 +304,10 @@ config GENERATE_PIRQ_TABLE
 	bool
 	default HAVE_PIRQ_TABLE
 
+config GENERATE_SMBIOS_TABLES
+	bool
+	default y
+
 menu "System tables"
 
 config WRITE_HIGH_TABLES
@@ -342,6 +346,15 @@ config GENERATE_PIRQ_TABLE
 
 	  If unsure, say Y.
 
+config GENERATE_SMBIOS_TABLES
+	depends on ARCH_X86
+	bool "Generate SMBIOS tables"
+	default y
+	help
+	  Generate SMBIOS tables for this board.
+
+	  If unsure, say Y.
+
 endmenu
 
 menu "Payload"

src/arch/x86/boot/Makefile.inc

@@ -6,8 +6,10 @@ ramstage-y += tables.c
 ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
 ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
+ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
 
 $(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
+$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h
 

src/arch/x86/boot/smbios.c

@@ -0,0 +1,293 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <smbios.h>
+#include <console/console.h>
+#include <build.h>
+#include <device/device.h>
+#include <arch/cpu.h>
+#include <cpu/x86/name.h>
+#include <cbfs_core.h>
+#include <arch/byteorder.h>
+
+static u8 smbios_checksum(u8 *p, u32 length)
+{
+	u8 ret = 0;
+	while (length--)
+		ret += *p++;
+	return -ret;
+}
+
+
+int smbios_add_string(char *start, const char *str)
+{
+	int i = 1;
+	char *p = start;
+
+	for(;;) {
+		if (!*p) {
+			strcpy(p, str);
+			p += strlen(str);
+			*p++ = '\0';
+			*p++ = '\0';
+			return i;
+		}
+
+		if (!strcmp(p, str))
+			return i;
+
+		p += strlen(p)+1;
+		i++;
+	}
+}
+
+int smbios_string_table_len(char *start)
+{
+	char *p = start;
+	int i, len = 0;
+
+	while(*p) {
+		i = strlen(p) + 1;
+		p += i;
+		len += i;
+	}
+	return len + 1;
+}
+
+static int smbios_cpu_vendor(char *start)
+{
+	char tmp[13];
+	u32 *_tmp = (u32 *)tmp;
+	struct cpuid_result res = cpuid(0);
+
+	_tmp[0] = res.ebx;
+	_tmp[1] = res.edx;
+	_tmp[2] = res.ecx;
+	tmp[12] = '\0';
+	return smbios_add_string(start, tmp);
+
+}
+
+static int smbios_processor_name(char *start)
+{
+	char tmp[49];
+	u32  *_tmp = (u32 *)tmp;
+	struct cpuid_result res;
+	int i;
+
+	for (i = 0; i < 3; i++) {
+		res = cpuid(0x80000002 + i);
+		_tmp[i * 4 + 0] = res.eax;
+		_tmp[i * 4 + 1] = res.ebx;
+		_tmp[i * 4 + 2] = res.ecx;
+		_tmp[i * 4 + 3] = res.edx;
+	}
+
+	tmp[48] = 0;
+	return smbios_add_string(start, tmp);
+}
+
+static int smbios_write_type0(unsigned long *current, int handle)
+{
+	struct cbfs_header *hdr;
+	struct smbios_type0 *t = (struct smbios_type0 *)*current;
+	int len = sizeof(struct smbios_type0);
+
+	memset(t, 0, sizeof(struct smbios_type0));
+	t->type = SMBIOS_BIOS_INFORMATION;
+	t->handle = handle;
+	t->length = len - 2;
+
+	t->vendor = smbios_add_string(t->eos, "coreboot");
+	t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
+	t->bios_version = smbios_add_string(t->eos, COREBOOT_VERSION);
+
+	if ((hdr = get_cbfs_header()) != (struct cbfs_header *)0xffffffff)
+		t->bios_rom_size = (ntohl(hdr->romsize) / 65535) - 1;
+	t->system_bios_major_release = 4;
+	t->bios_characteristics =
+		BIOS_CHARACTERISTICS_PCI_SUPPORTED |
+#if CONFIG_CARDBUS_PLUGIN_SUPPORT
+		BIOS_CHARACTERISTICS_PC_CARD |
+#endif
+		BIOS_CHARACTERISTICS_SELECTABLE_BOOT |
+		BIOS_CHARACTERISTICS_UPGRADEABLE;
+
+#if CONFIG_GENERATE_ACPI_TABLES
+	t->bios_characteristics_ext1 = BIOS_EXT1_CHARACTERISTICS_ACPI;
+#endif
+	t->bios_characteristics_ext2 = BIOS_EXT2_CHARACTERISTICS_TARGET;
+	len = t->length + smbios_string_table_len(t->eos);
+	*current += len;
+	return len;
+}
+
+static int smbios_write_type1(unsigned long *current, int handle)
+{
+	struct smbios_type1 *t = (struct smbios_type1 *)*current;
+	int len = sizeof(struct smbios_type1);
+
+	memset(t, 0, sizeof(struct smbios_type1));
+	t->type = SMBIOS_SYSTEM_INFORMATION;
+	t->handle = handle;
+	t->length = len - 2;
+	t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR);
+	t->product_name = smbios_add_string(t->eos, CONFIG_MAINBOARD_PART_NUMBER);
+	len = t->length + smbios_string_table_len(t->eos);
+	*current += len;
+	return len;
+}
+
+static int smbios_write_type3(unsigned long *current, int handle)
+{
+	struct smbios_type3 *t = (struct smbios_type3 *)*current;
+	int len = sizeof(struct smbios_type3);
+
+	memset(t, 0, sizeof(struct smbios_type3));
+	t->type = SMBIOS_SYSTEM_ENCLOSURE;
+	t->handle = handle;
+	t->length = len - 2;
+	t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR);
+	t->bootup_state = SMBIOS_STATE_SAFE;
+	t->power_supply_state = SMBIOS_STATE_SAFE;
+	t->thermal_state = SMBIOS_STATE_SAFE;
+	t->_type = 3;
+	t->security_status = SMBIOS_STATE_SAFE;
+	len = t->length + smbios_string_table_len(t->eos);
+	*current += len;
+	return len;
+}
+
+static int smbios_write_type4(unsigned long *current, int handle)
+{
+	struct cpuid_result res;
+	struct smbios_type4 *t = (struct smbios_type4 *)*current;
+	int len = sizeof(struct smbios_type4);
+
+	res = cpuid(1);
+
+	memset(t, 0, sizeof(struct smbios_type4));
+	t->type = SMBIOS_PROCESSOR_INFORMATION;
+	t->handle = handle;
+	t->length = len - 2;
+	t->processor_id[0] = res.eax;
+	t->processor_id[1] = res.edx;
+	t->processor_manufacturer = smbios_cpu_vendor(t->eos);
+	t->processor_version = smbios_processor_name(t->eos);
+	t->processor_family = 0x0c;
+	t->processor_type = 3; /* System Processor */
+	t->processor_upgrade = 0x06;
+	t->core_count = (res.ebx >> 16) & 0xff;
+	t->l1_cache_handle = 0xffff;
+	t->l2_cache_handle = 0xffff;
+	t->l3_cache_handle = 0xffff;
+	t->processor_upgrade = 1;
+	len = t->length + smbios_string_table_len(t->eos);
+	*current += len;
+	return len;
+}
+
+static int smbios_write_type32(unsigned long *current, int handle)
+{
+	struct smbios_type32 *t = (struct smbios_type32 *)*current;
+	int len = sizeof(struct smbios_type32);
+
+	memset(t, 0, sizeof(struct smbios_type32));
+	t->type = SMBIOS_SYSTEM_BOOT_INFORMATION;
+	t->handle = handle;
+	t->length = len - 2;
+	*current += len;
+	return len;
+}
+
+static int smbios_write_type127(unsigned long *current, int handle)
+{
+	struct smbios_type127 *t = (struct smbios_type127 *)*current;
+	int len = sizeof(struct smbios_type127);
+
+	memset(t, 0, sizeof(struct smbios_type127));
+	t->type = SMBIOS_END_OF_TABLE;
+	t->handle = handle;
+	t->length = len - 2;
+	*current += len;
+	return len;
+}
+
+static int smbios_walk_device_tree(device_t tree, int *handle, unsigned long *current)
+{
+	device_t dev;
+	int len = 0;
+
+	for(dev = tree; dev; dev = dev->next) {
+		printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev->chip_ops ? dev->chip_ops->name : "");
+
+		if (dev->ops && dev->ops->get_smbios_data)
+			len += dev->ops->get_smbios_data(dev, handle, current);
+
+		if (dev->chip_ops && dev->chip_ops->get_smbios_data)
+			len += dev->chip_ops->get_smbios_data(dev, handle, current);
+	}
+	return len;
+}
+
+unsigned long smbios_write_tables(unsigned long current)
+{
+	struct smbios_entry *se;
+	unsigned long tables;
+	int len, handle = 0;
+
+	current = ALIGN(current, 16);
+	printk(BIOS_DEBUG, "%s: %08lx\n", __func__, current);
+
+	se = (struct smbios_entry *)current;
+	current += sizeof(struct smbios_entry);
+	current = ALIGN(current, 16);
+
+	tables = current;
+	len = smbios_write_type0(&current, handle++);
+	len += smbios_write_type1(&current, handle++);
+	len += smbios_write_type3(&current, handle++);
+	len += smbios_write_type4(&current, handle++);
+	len += smbios_write_type32(&current, handle++);
+
+	len += smbios_walk_device_tree(all_devices, &handle, &current);
+
+	len += smbios_write_type127(&current, handle++);
+
+	memset(se, 0, sizeof(struct smbios_entry));
+	memcpy(se->anchor, "_SM_", 4);
+	se->length = sizeof(struct smbios_entry);
+	se->major_version = 2;
+	se->minor_version = 7;
+	se->max_struct_size = 24;
+	se->struct_count = handle;
+	memcpy(se->intermediate_anchor_string, "_DMI_", 5);
+
+	se->struct_table_address = (u32)tables;
+	se->struct_table_length = len;
+
+	se->intermediate_checksum = smbios_checksum((u8 *)se + 0x10,
+						    sizeof(struct smbios_entry) - 0x10);
+	se->checksum = smbios_checksum((u8 *)se, sizeof(struct smbios_entry));
+	return current;
+}

src/arch/x86/boot/tables.c

@@ -31,6 +31,7 @@
 #include <cpu/x86/multiboot.h>
 #include <cbmem.h>
 #include <lib.h>
+#include <smbios.h>
 
 uint64_t high_tables_base = 0;
 uint64_t high_tables_size;
@@ -120,7 +121,7 @@ struct lb_memory *write_tables(void)
 #endif /* CONFIG_GENERATE_MP_TABLE */
 
 #if CONFIG_GENERATE_ACPI_TABLES == 1
-#define MAX_ACPI_SIZE (47 * 1024)
+#define MAX_ACPI_SIZE (45 * 1024)
 	post_code(0x9c);
 
 	/* Write ACPI tables to F segment and high tables area */
@@ -178,7 +179,28 @@ struct lb_memory *write_tables(void)
 	}
 
 #endif
+#define MAX_SMBIOS_SIZE 2048
+#if CONFIG_GENERATE_SMBIOS_TABLES
+	high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_SMBIOS, MAX_SMBIOS_SIZE);
+	if (high_table_pointer) {
+		unsigned long new_high_table_pointer;
 
+		new_high_table_pointer = smbios_write_tables(high_table_pointer);
+		rom_table_end = ALIGN(rom_table_end, 16);
+		memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry));
+		rom_table_end += sizeof(struct smbios_entry);
+
+		if (new_high_table_pointer > ( high_table_pointer + MAX_SMBIOS_SIZE)) {
+			printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n");
+		}
+                printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n",
+				new_high_table_pointer - high_table_pointer);
+	} else {
+		unsigned long new_rom_table_end = smbios_write_tables(rom_table_end);
+		printk(BIOS_DEBUG, "SMBIOS size %ld bytes\n", new_rom_table_end - rom_table_end);
+		rom_table_end = ALIGN(new_rom_table_end, 16);
+	}
+#endif
 
 #define MAX_COREBOOT_TABLE_SIZE (8 * 1024)
 	post_code(0x9d);

src/include/cbmem.h

@@ -38,6 +38,7 @@ extern uint64_t high_tables_base, high_tables_size;
 #define CBMEM_ID_PIRQ		0x49525154
 #define CBMEM_ID_MPTABLE	0x534d5054
 #define CBMEM_ID_RESUME		0x5245534d
+#define CBMEM_ID_SMBIOS         0x534d4254
 #define CBMEM_ID_NONE		0x00000000
 
 void cbmem_initialize(void);

src/include/device/device.h

@@ -16,6 +16,9 @@ struct smbus_bus_operations;
 struct chip_operations {
 	void (*enable_dev)(struct device *dev);
 	const char *name;
+#if CONFIG_GENERATE_SMBIOS_TABLES
+	int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current);
+#endif
 };
 
 #define CHIP_NAME(X) .name = X,
@@ -31,6 +34,9 @@ struct device_operations {
 	void (*enable)(device_t dev);
 	void (*set_link)(device_t dev, unsigned int link);
 	void (*reset_bus)(struct bus *bus);
+#if CONFIG_GENERATE_SMBIOS_TABLES
+	int (*get_smbios_data)(device_t dev, int *handle, unsigned long *current);
+#endif
 	const struct pci_operations *ops_pci;
 	const struct smbus_bus_operations *ops_smbus_bus;
 	const struct pci_bus_operations *ops_pci_bus;

src/include/smbios.h

@@ -0,0 +1,197 @@
+#ifndef SMBIOS_H
+#define SMBIOS_H
+
+#include <types.h>
+
+unsigned long smbios_write_tables(unsigned long start);
+int smbios_add_string(char *start, const char *str);
+int smbios_string_table_len(char *start);
+
+#define BIOS_CHARACTERISTICS_PCI_SUPPORTED  (1 << 7)
+#define BIOS_CHARACTERISTICS_PC_CARD  (1 << 8)
+#define BIOS_CHARACTERISTICS_PNP  (1 << 9)
+#define BIOS_CHARACTERISTICS_APM (1 << 10)
+#define BIOS_CHARACTERISTICS_UPGRADEABLE      (1 << 11)
+#define BIOS_CHARACTERISTICS_SHADOW           (1 << 12)
+#define BIOS_CHARACTERISTICS_BOOT_FROM_CD     (1 << 15)
+#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT  (1 << 16)
+#define BIOS_CHARACTERISTICS_BIOS_SOCKETED    (1 << 17)
+
+#define BIOS_EXT1_CHARACTERISTICS_ACPI    (1 << 0)
+#define BIOS_EXT2_CHARACTERISTICS_TARGET  (1 << 2)
+
+#define SMBIOS_STATE_SAFE 3
+typedef enum {
+	SMBIOS_BIOS_INFORMATION=0,
+	SMBIOS_SYSTEM_INFORMATION=1,
+	SMBIOS_SYSTEM_ENCLOSURE=3,
+	SMBIOS_PROCESSOR_INFORMATION=4,
+	SMBIOS_CACHE_INFORMATION=7,
+	SMBIOS_SYSTEM_SLOTS=9,
+	SMBIOS_PHYS_MEMORY_ARRAY=16,
+	SMBIOS_MEMORY_DEVICE=17,
+	SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS=19,
+	SMBIOS_SYSTEM_BOOT_INFORMATION=32,
+	SMBIOS_END_OF_TABLE=127,
+} smbios_struct_type_t;
+
+struct smbios_entry {
+	u8 anchor[4];
+	u8 checksum;
+	u8 length;
+	u8 major_version;
+	u8 minor_version;
+	u16 max_struct_size;
+	u8 entry_point_rev;
+	u8 formwatted_area[5];
+	u8 intermediate_anchor_string[5];
+	u8 intermediate_checksum;
+	u16 struct_table_length;
+	u32 struct_table_address;
+	u16 struct_count;
+	u8 smbios_bcd_revision;
+} __attribute__((packed));
+
+struct smbios_type0 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 vendor;
+	u8 bios_version;
+	u16 bios_start_segment;
+	u8 bios_release_date;
+	u8 bios_rom_size;
+	u64 bios_characteristics;
+	u8 bios_characteristics_ext1;
+	u8 bios_characteristics_ext2;
+	u8 system_bios_major_release;
+	u8 system_bios_minor_release;
+	u8 ec_major_release;
+	u8 ec_minor_release;
+	char eos[2];
+} __attribute__((packed));
+
+struct smbios_type1 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 manufacturer;
+	u8 product_name;
+	u8 version;
+	u8 serial_number;
+	u8 uuid[16];
+	u8 wakeup_type;
+	u8 sku;
+	u8 family;
+	char eos[2];
+} __attribute__((packed));
+
+struct smbios_type3 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 manufacturer;
+	u8 _type;
+	u8 version;
+	u8 serial_number;
+	u8 asset_tag_number;
+	u8 bootup_state;
+	u8 power_supply_state;
+	u8 thermal_state;
+	u8 security_status;
+	u32 oem_defined;
+	u8 height;
+	u8 number_of_power_cords;
+	u8 element_count;
+	u8 element_record_length;
+	char eos[2];
+} __attribute__((packed));
+
+struct smbios_type4 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 socket_designation;
+	u8 processor_type;
+	u8 processor_family;
+	u8 processor_manufacturer;
+	u32 processor_id[2];
+	u8 processor_version;
+	u8 voltage;
+	u16 external_clock;
+	u16 max_speed;
+	u16 current_speed;
+	u8 status;
+	u8 processor_upgrade;
+	u16 l1_cache_handle;
+	u16 l2_cache_handle;
+	u16 l3_cache_handle;
+	u8 serial_number;
+	u8 asset_tag;
+	u8 part_number;
+	u8 core_count;
+	u8 core_enabled;
+	u8 thread_count;
+	u16 processor_characteristics;
+	u16 processor_family2;
+	char eos[2];
+} __attribute__((packed));
+
+struct smbios_type16 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 location;
+	u8 use;
+	u8 memory_error_correction;
+	u32 maximum_capacity;
+	u16 memory_error_information_handle;
+	u16 number_of_memory_devices;
+	u64 extended_maximum_capacity;
+	char eos[2];
+} __attribute__((packed));
+
+struct smbios_type17 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u16 phys_memory_array_handle;
+	u16 memory_error_information_handle;
+	u16 total_width;
+	u16 data_width;
+	u16 size;
+	u8 form_factor;
+	u8 device_set;
+	u8 device_locator;
+	u8 bank_locator;
+	u8 memory_type;
+	u16 type_detail;
+	u16 speed;
+	u8 manufacturer;
+	u8 serial_number;
+	u8 asset_tag;
+	u8 part_number;
+	u8 attributes;
+	u16 extended_size;
+	u16 clock_speed;
+
+	char eos[2];
+} __attribute__((packed));
+
+struct smbios_type32 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 reserved[6];
+	u8 boot_status;
+	u8 eos[2];
+} __attribute__((packed));
+
+struct smbios_type127 {
+	u8 type;
+	u8 length;
+	u16 handle;
+	u8 eos[2];
+} __attribute__((packed));
+
+#endif

src/lib/cbmem.c

@@ -229,6 +229,7 @@ void cbmem_list(void)
 		case CBMEM_ID_PIRQ:	 printk(BIOS_DEBUG, "IRQ TABLE  "); break;
 		case CBMEM_ID_MPTABLE:	 printk(BIOS_DEBUG, "SMP TABLE  "); break;
 		case CBMEM_ID_RESUME:	 printk(BIOS_DEBUG, "ACPI RESUME"); break;
+		case CBMEM_ID_SMBIOS:    printk(BIOS_DEBUG, "SMBIOS     "); break;
 		default: printk(BIOS_DEBUG, "%08x ", cbmem_toc[i].id);
 		}
 		printk(BIOS_DEBUG, "%08llx ", cbmem_toc[i].base);

src/mainboard/emulation/qemu-x86/northbridge.c

@@ -9,6 +9,7 @@
 #include <bitops.h>
 #include "chip.h"
 #include <delay.h>
+#include <smbios.h>
 
 #if CONFIG_WRITE_HIGH_TABLES==1
 #include <cbmem.h>
@@ -19,18 +20,24 @@
 #define HIGH_RAM_ADDR 0x35
 #define LOW_RAM_ADDR 0x34
 
+static unsigned long qemu_get_memory_size(void)
+{
+	unsigned long tomk;
+	outb (HIGH_RAM_ADDR, CMOS_ADDR_PORT);
+	tomk = ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
+	outb (LOW_RAM_ADDR, CMOS_ADDR_PORT);
+	tomk |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
+	tomk += 16 * 1024;
+	return tomk;
+}
+
 static void cpu_pci_domain_set_resources(device_t dev)
 {
 	u32 pci_tolm = find_pci_tolm(dev->link_list);
 	unsigned long tomk = 0, tolmk;
 	int idx;
 
-	outb (HIGH_RAM_ADDR, CMOS_ADDR_PORT);
+	tomk = qemu_get_memory_size();
-	tomk = ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
-	outb (LOW_RAM_ADDR, CMOS_ADDR_PORT);
-	tomk |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
-	tomk += 16 * 1024;
-
 	printk(BIOS_DEBUG, "Detected %lu Kbytes (%lu MiB) RAM.\n",
 	       tomk, tomk / 1024);
 
@@ -80,12 +87,67 @@ static void cpu_pci_domain_read_resources(struct device *dev)
 		     IORESOURCE_ASSIGNED;
 }
 
+#if CONFIG_GENERATE_SMBIOS_TABLES
+static int qemu_get_smbios_data16(int handle, unsigned long *current)
+{
+	struct smbios_type16 *t = (struct smbios_type16 *)*current;
+	int len = sizeof(struct smbios_type16);
+
+	memset(t, 0, sizeof(struct smbios_type16));
+	t->type = SMBIOS_PHYS_MEMORY_ARRAY;
+	t->handle = handle;
+	t->length = len - 2;
+	t->location = 3; /* Location: System Board */
+	t->use = 3; /* System memory */
+	t->memory_error_correction = 3; /* No error correction */
+	t->maximum_capacity = qemu_get_memory_size();
+	*current += len;
+	return len;
+}
+
+static int qemu_get_smbios_data17(int handle, int parent_handle, unsigned long *current)
+{
+	struct smbios_type17 *t = (struct smbios_type17 *)*current;
+	int len;
+
+	memset(t, 0, sizeof(struct smbios_type17));
+	t->type = SMBIOS_MEMORY_DEVICE;
+	t->handle = handle;
+	t->phys_memory_array_handle = parent_handle;
+	t->length = sizeof(struct smbios_type17) - 2;
+	t->size = qemu_get_memory_size() / 1024;
+	t->data_width = 64;
+	t->total_width = 64;
+	t->form_factor = 9; /* DIMM */
+	t->device_locator = smbios_add_string(t->eos, "Virtual");
+	t->memory_type = 0x12; /* DDR */
+	t->type_detail = 0x80; /* Synchronous */
+	t->speed = 200;
+	t->clock_speed = 200;
+	t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR);
+	len = t->length + smbios_string_table_len(t->eos);
+	*current += len;
+	return len;
+}
+
+static int qemu_get_smbios_data(device_t dev, int *handle, unsigned long *current)
+{
+	int len;
+	len = qemu_get_smbios_data16(*handle, current);
+	len += qemu_get_smbios_data17(*handle+1, *handle, current);
+	*handle += 2;
+	return len;
+}
+#endif
 static struct device_operations pci_domain_ops = {
 	.read_resources		= cpu_pci_domain_read_resources,
 	.set_resources		= cpu_pci_domain_set_resources,
 	.enable_resources	= NULL,
 	.init			= NULL,
 	.scan_bus		= pci_domain_scan_bus,
+#if CONFIG_GENERATE_SMBIOS_TABLES
+	.get_smbios_data	= qemu_get_smbios_data,
+#endif
 };
 
 static void enable_dev(struct device *dev)

src/mainboard/getac/p470/acpi_tables.c

@@ -29,7 +29,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "dmi.h"
 
 extern unsigned char AmlCode[];
 
@@ -355,15 +354,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }

src/mainboard/getac/p470/dmi.h

@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static const u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};

src/mainboard/ibase/mb899/acpi_tables.c

@@ -28,7 +28,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -258,15 +257,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }

src/mainboard/ibase/mb899/dmi.h

@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};

src/mainboard/intel/d945gclf/acpi_tables.c

@@ -28,7 +28,6 @@
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
 #include <arch/ioapic.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -245,15 +244,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	acpi_add_table(rsdp, ssdt);
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }

src/mainboard/intel/d945gclf/dmi.h

@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};

src/mainboard/iwave/iWRainbowG6/acpi_tables.c

@@ -28,7 +28,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -264,15 +263,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }

src/mainboard/iwave/iWRainbowG6/dmi.h

@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x2d, 0x1f, 0x02, 0x03, 0x51, 0x00, 0x00, 0x00,
-	    0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0xeb, 0xa8, 0x03, 0xa0, 0xff, 0x0f, 0x00,
-	    0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde,
-	    0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74,
-	    0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f,
-	    0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};

src/mainboard/kontron/986lcd-m/acpi_tables.c

@@ -28,7 +28,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -258,15 +257,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }

src/mainboard/kontron/986lcd-m/dmi.h

@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};

src/mainboard/lenovo/t60/acpi_tables.c

@@ -29,7 +29,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -294,15 +293,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 
 	/* Enable Dummy DCC ON# for DVI */

src/mainboard/lenovo/x60/acpi_tables.c

@@ -29,7 +29,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -294,15 +293,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 
 	/* Enable Dummy DCC ON# for DVI */

src/mainboard/roda/rk886ex/acpi_tables.c

@@ -29,7 +29,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 #if CONFIG_HAVE_ACPI_SLIC
@@ -294,15 +293,6 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 
 	printk(BIOS_DEBUG, "current = %lx\n", current);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
-	memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
-	current += DMI_TABLE_SIZE;
-	ALIGN_CURRENT;
-#endif
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 
 	/* Enable Dummy DCC ON# for DVI */

src/mainboard/roda/rk886ex/dmi.h

@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};

src/mainboard/via/vt8454c/acpi_tables.c

@@ -26,7 +26,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "dmi.h"
 
 extern const unsigned char AmlCode[];
 
@@ -194,10 +193,6 @@ unsigned long write_acpi_tables(unsigned long start)
 
 	acpi_create_fadt(fadt, facs, dsdt);
 	acpi_add_table(rsdp, fadt);
-
-	printk(BIOS_DEBUG, "ACPI:     * DMI (Linux workaround)\n");
-	memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-
 	printk(BIOS_INFO, "ACPI: done.\n");
 	return current;
 }

src/mainboard/via/vt8454c/dmi.h

@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define DMI_TABLE_SIZE 0x55
-
-static u8 dmi_table[DMI_TABLE_SIZE] = {
-	0x5f, 0x53, 0x4d, 0x5f, 0x29, 0x1f, 0x02, 0x03, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x5f, 0x44, 0x4d, 0x49, 0x5f, 0x61, 0x35, 0x00, 0xa0, 0xff, 0x0f, 0x00, 0x01, 0x00, 0x23, 0x00,
-	0x00, 0x14, 0x00, 0x00, 0x01, 0x02, 0x00, 0xe0, 0x03, 0x07, 0x90, 0xde, 0xcb, 0x7f, 0x00, 0x00,
-	0x00, 0x00, 0x37, 0x01, 0x63, 0x6f, 0x72, 0x65, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	0x47, 0x6d, 0x62, 0x48, 0x00, 0x32, 0x2e, 0x30, 0x00, 0x30, 0x33, 0x2f, 0x31, 0x33, 0x2f, 0x32,
-	0x30, 0x30, 0x38, 0x00, 0x00
-};