soc/amd/common/fsp/dmi: Set dimm voltage based on memory type
Voltage set based on standard configuration for each type. TEST=build/boot google/skyrim, verify output in cbmem console log, DMI type 17 table. Change-Id: I9b1e68a9417e43cbb9c55b4c471664f3f9090342 Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66981 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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@ -37,6 +37,25 @@ static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed)
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}
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}
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/**
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* Return DDR voltage (in mV) based on memory type
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*/
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static uint16_t ddr_get_voltage(uint16_t ddr_type)
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{
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switch (ddr_type) {
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case MEMORY_TYPE_DDR4:
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return 1200;
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case MEMORY_TYPE_LPDDR4:
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case MEMORY_TYPE_DDR5:
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return 1100;
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case MEMORY_TYPE_LPDDR5:
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return 1050;
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default:
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printk(BIOS_ERR, "Unknown memory type %x\n", ddr_type);
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return 0;
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}
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}
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/**
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* Populate dimm_info using AGESA TYPE17_DMI_INFO.
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*/
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@ -67,6 +86,8 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17,
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dimm->bank_locator = 0;
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dimm->vdd_voltage = ddr_get_voltage(dmi17->MemoryType);
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strncpy((char *)dimm->module_part_number, dmi17->PartNumber,
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sizeof(dimm->module_part_number) - 1);
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}
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@ -79,6 +100,7 @@ static void print_dimm_info(const struct dimm_info *dimm)
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" ddr_type: 0x%hx\n"
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" max_speed_mts: %hu\n"
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" config_speed_mts: %hu\n"
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" vdd_voltage: %hu\n"
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" rank_per_dimm: %hhu\n"
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" channel_num: %hhu\n"
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" dimm_num: %hhu\n"
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@ -92,6 +114,7 @@ static void print_dimm_info(const struct dimm_info *dimm)
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dimm->ddr_type,
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dimm->max_speed_mts,
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dimm->configured_speed_mts,
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dimm->vdd_voltage,
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dimm->rank_per_dimm,
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dimm->channel_num,
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dimm->dimm_num,
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