soc/amd/stoneyridge: Get entire DDR4 SPD

Set the SPD size to 512 to get the entire DDR4 SPD.

Change-Id: I0bdf8101de22533b2f4337d3c9e4423d62e6c66d
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marc Jones 2017-11-16 15:26:00 -07:00 committed by Marc Jones
parent 8788fd6395
commit 17431abab0
2 changed files with 6 additions and 1 deletions

View File

@ -352,4 +352,8 @@ comment "AMD Firmware Directory Table set to location for 8MB ROM"
comment "AMD Firmware Directory Table set to location for 16MB ROM" comment "AMD Firmware Directory Table set to location for 16MB ROM"
depends on AMD_FWM_POSITION_INDEX = 5 depends on AMD_FWM_POSITION_INDEX = 5
config DIMM_SPD_SIZE
int
default 512 # DDR4
endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4

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@ -40,7 +40,8 @@ AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2,
[info->SocketId][info->MemChannelId][info->DimmId]; [info->SocketId][info->MemChannelId][info->DimmId];
if (spd_address == 0) if (spd_address == 0)
return AGESA_ERROR; return AGESA_ERROR;
int err = sb_read_spd(spd_address, (void *)info->Buffer, 128); int err = sb_read_spd(spd_address, (void *)info->Buffer,
CONFIG_DIMM_SPD_SIZE);
if (err) if (err)
return AGESA_ERROR; return AGESA_ERROR;
return AGESA_SUCCESS; return AGESA_SUCCESS;