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AMD Thatcher: ConnectorTypeDP supports both DP and HDMI 

It seems that ConnectorTypeDP in DdiList supports both DP and HDMI monitors.
I tested by DP monitor and HDMI monitor connected by passive DP->HDMI adapter.
Video and audio are OK. Hot plugging is also supported.

This commit partially reverts commit >AMD Thatcher: Fix PCIE link issues< (7f23aeb0) [1].

[1] http://review.coreboot.org/3011

Change-Id: I23cf1c69a8274f47daf56f1a12aafd88bad4a128
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3088
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Siyuan Wang 2013-04-15 17:58:57 +08:00 committed by Ronald G. Minnich
parent 2810afa57d
commit 175ad4aa6e
1 changed files with 3 additions and 12 deletions
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15
src/mainboard/amd/thatcher/PlatformGnbPcie.c
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@ -23,7 +23,6 @@
#include "heapManager.h" #include "heapManager.h"
#include "PlatformGnbPcieComplex.h" #include "PlatformGnbPcieComplex.h"
#include "Filecode.h" #include "Filecode.h"
#include "Fch.h"
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
@ -80,19 +79,19 @@ PCIe_PORT_DESCRIPTOR PortList [] = {
PCIe_DDI_DESCRIPTOR DdiList [] = { PCIe_DDI_DESCRIPTOR DdiList [] = {
// DP0 to HDMI0/DP0 // DP0 to HDMI0/DP0
{ {
1, 0,
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27), PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1) PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
}, },
// DP1 to HDMI1/DP1 // DP1 to HDMI1/DP1
{ {
1, 0,
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31), PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2) PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2)
}, },
// DP2 to MINI-DDI Card // DP2 to MINI-DDI Card
{ {
1, DESCRIPTOR_TERMINATE_LIST,
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 32, 35), PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 32, 35),
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux3, Hdp3) PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux3, Hdp3)
}, },
@ -130,7 +129,6 @@ OemCustomizeInitEarly (
VOID *TrinityPcieComplexListPtr; VOID *TrinityPcieComplexListPtr;
VOID *TrinityPciePortPtr; VOID *TrinityPciePortPtr;
VOID *TrinityPcieDdiPtr; VOID *TrinityPcieDdiPtr;
UINT8 Value;
ALLOCATE_HEAP_PARAMS AllocHeapParams; ALLOCATE_HEAP_PARAMS AllocHeapParams;
@ -177,13 +175,6 @@ OemCustomizeInitEarly (
LibAmdMemCopy (TrinityPcieComplexListPtr, &Trinity, sizeof (PCIe_COMPLEX_DESCRIPTOR), &InitEarly->StdHeader); LibAmdMemCopy (TrinityPcieComplexListPtr, &Trinity, sizeof (PCIe_COMPLEX_DESCRIPTOR), &InitEarly->StdHeader);
LibAmdMemCopy (TrinityPciePortPtr, &PortList[0], sizeof (PCIe_PORT_DESCRIPTOR) * 7, &InitEarly->StdHeader); LibAmdMemCopy (TrinityPciePortPtr, &PortList[0], sizeof (PCIe_PORT_DESCRIPTOR) * 7, &InitEarly->StdHeader);
LibAmdMemRead (AccessWidth8, ACPI_MMIO_BASE + GPIO_BASE + 50, &Value, &InitEarly->StdHeader);
if (!(Value & 0x80))
DdiList[0].Ddi.ConnectorType = ConnectorTypeHDMI;
LibAmdMemRead (AccessWidth8, ACPI_MMIO_BASE + GPIO_BASE + 51, &Value, &InitEarly->StdHeader);
if (!(Value & 0x80))
DdiList[1].Ddi.ConnectorType = ConnectorTypeHDMI;
LibAmdMemCopy (TrinityPcieDdiPtr, &DdiList[0], sizeof (PCIe_DDI_DESCRIPTOR) * 3, &InitEarly->StdHeader); LibAmdMemCopy (TrinityPcieDdiPtr, &DdiList[0], sizeof (PCIe_DDI_DESCRIPTOR) * 3, &InitEarly->StdHeader);
((PCIe_COMPLEX_DESCRIPTOR*)TrinityPcieComplexListPtr)->PciePortList = (PCIe_PORT_DESCRIPTOR*)TrinityPciePortPtr; ((PCIe_COMPLEX_DESCRIPTOR*)TrinityPcieComplexListPtr)->PciePortList = (PCIe_PORT_DESCRIPTOR*)TrinityPciePortPtr;