mb/google/drallion: Add method to set GPIOs in romstage

Add method variant_romstage_gpio_table() with empty implementation to
be used in a subsequent commit for touchscreen power sequencing.
Call method in romstage to program any GPIOs that may need to be set.

TEST=tested with rest of patch train

Change-Id: I0ad0c18a8b61e59a943a453882bf74762bac4700
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71190
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2022-12-21 14:12:40 -06:00 committed by Martin L Roth
parent bfcea14a16
commit 17a07b38a1
3 changed files with 13 additions and 0 deletions

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@ -4,14 +4,20 @@
#include <soc/cnl_memcfg_init.h> #include <soc/cnl_memcfg_init.h>
#include <soc/romstage.h> #include <soc/romstage.h>
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <variant/gpio.h>
void mainboard_memory_init_params(FSPM_UPD *memupd) void mainboard_memory_init_params(FSPM_UPD *memupd)
{ {
struct cnl_mb_cfg board_memcfg; struct cnl_mb_cfg board_memcfg;
const struct pad_config *pads;
size_t pads_num;
variant_mainboard_post_init_params(memupd); variant_mainboard_post_init_params(memupd);
wilco_ec_romstage_init(); wilco_ec_romstage_init();
cannonlake_memcfg_init(&memupd->FspmConfig, get_variant_memory_cfg(&board_memcfg)); cannonlake_memcfg_init(&memupd->FspmConfig, get_variant_memory_cfg(&board_memcfg));
pads = variant_romstage_gpio_table(&pads_num);
gpio_configure_pads(pads, pads_num);
} }

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@ -249,6 +249,12 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
return early_gpio_table; return early_gpio_table;
} }
const struct pad_config *variant_romstage_gpio_table(size_t *num)
{
*num = 0;
return NULL;
}
static const struct cros_gpio cros_gpios[] = { static const struct cros_gpio cros_gpios[] = {
CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME), CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME),
CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME),

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@ -28,5 +28,6 @@
const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num);
const struct pad_config *variant_romstage_gpio_table(size_t *num);
#endif #endif