soc/intel/jasperlake: Generate LP4x SPD files using gen_spd.go

This change uses gen_spd.go and global_lp4x_mem_parts.json.txt to
generate SPD files for currently known LP4x memory parts that
can be used with JSL-based mainboards.

Following files are added:
1. spd-*.hex: SPD files auto-generated by gen_spd.go
2. spd_manifest.generated.txt: Manifest file auto-generated by
gen_spd.go

Mainboards can use the SPD files from SoC directly when creating
SPD binary to add to CBFS.

Change-Id: Ic52506b809c66b9f7cf25a100a959d85c67addf2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41876
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/jasperlake/spd/lp4x/spd-1.hex

@@ -0,0 +1,32 @@
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src/soc/intel/jasperlake/spd/lp4x/spd-2.hex

@@ -0,0 +1,32 @@
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src/soc/intel/jasperlake/spd/lp4x/spd-3.hex

@@ -0,0 +1,32 @@
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src/soc/intel/jasperlake/spd/lp4x/spd-4.hex

@@ -0,0 +1,32 @@
+23 11 11 0E 17 29 04 08 00 00 00 00 02 22 00 00
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src/soc/intel/jasperlake/spd/lp4x/spd-5.hex

@@ -0,0 +1,32 @@
+23 11 11 0E 16 21 94 08 00 00 00 00 02 22 00 00
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src/soc/intel/jasperlake/spd/lp4x/spd-6.hex

@@ -0,0 +1,32 @@
+23 11 11 0E 17 29 94 08 00 00 00 00 02 22 00 00
+00 00 04 FF 92 54 05 00 87 00 90 A8 90 E0 0B F0
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src/soc/intel/jasperlake/spd/lp4x/spd-7.hex

@@ -0,0 +1,32 @@
+23 11 11 0E 15 19 04 08 00 00 00 00 02 22 00 00
+00 00 05 0A 80 54 01 00 89 00 90 A8 90 A0 05 D0
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src/soc/intel/jasperlake/spd/lp4x/spd_manifest.generated.txt

@@ -0,0 +1,9 @@
+H9HCNNNBKMMLXR-NEE,spd-1.hex
+H9HCNNNFAMMLXR-NEE,spd-2.hex
+K4U6E3S4AA-MGCL,spd-1.hex
+K4UBE3D4AA-MGCL,spd-3.hex
+MT53E1G32D2NP-046 WT:A,spd-4.hex
+H9HKNNNCRMBVAR-NEH,spd-5.hex
+MT53E1G64D4SQ-046 WT:A,spd-6.hex
+MT53E512M32D2NP-046 WT:F,spd-1.hex
+NT6AP256T32AV-J2,spd-7.hex