GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/nissa/yaviks: Disable V1P05 control pin 

Yaviks already disabled external V1P05, so disable V1P05 control pin
which controls the VCC_V1P105_EXT_1P05.

BUG=b:294456574
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot

Change-Id: I4128cfcfa5be0d141f0173e87518407331d79e8e
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77645
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wisley Chen 2023-09-05 09:08:39 +08:00 committed by Eric Lai
parent 7285c375fc
commit 184329c77a
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/brya/variants/yaviks/gpio.c
View File

@ -40,6 +40,8 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_F13, NONE), PAD_NC(GPP_F13, NONE),
/* F15 : GSXSRESET# ==> NC */ /* F15 : GSXSRESET# ==> NC */
PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
/* F23 : V1P05EXT_CTRL ==> NC */
PAD_NC(GPP_F23, NONE),
/* H8 : CNV_MFUART2_RXD ==> NC */ /* H8 : CNV_MFUART2_RXD ==> NC */
PAD_NC(GPP_H8, NONE), PAD_NC(GPP_H8, NONE),