arch/x86: Remove RELOCATABLE_RAMSTAGE

We always have it, no need to support opting-out.

For PLATFORM_HAS_DRAM_CLEAR there is a dependency of ramstage
located inside CBMEM, which is only true with ARCH_X86.

Change-Id: I5cbf4063c69571db92de2d321c14d30c272e8098
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43014
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2020-07-02 21:48:38 +03:00 committed by Patrick Georgi
parent 7c040adc8c
commit 18a8ba41cc
7 changed files with 8 additions and 81 deletions

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@ -270,20 +270,9 @@ config UBSAN
say N because it adds a small performance penalty and may abort
on code that happens to work in spite of the UB.
config RELOCATABLE_RAMSTAGE
bool
default y if ARCH_X86
select RELOCATABLE_MODULES
help
The reloctable ramstage support allows for the ramstage to be built
as a relocatable module. The stage loader can identify a place
out of the OS way so that copying memory is unnecessary during an S3
wake. When selecting this option the romstage is responsible for
determing a stack location to use for loading the ramstage.
choice
prompt "Stage Cache for ACPI S3 resume"
default NO_STAGE_CACHE if !HAVE_ACPI_RESUME || !RELOCATABLE_RAMSTAGE
default NO_STAGE_CACHE if !HAVE_ACPI_RESUME
default TSEG_STAGE_CACHE if SMM_TSEG
config NO_STAGE_CACHE
@ -576,7 +565,6 @@ source "src/console/Kconfig"
config HAVE_ACPI_RESUME
bool
default n
depends on RELOCATABLE_RAMSTAGE
config DISABLE_ACPI_HIBERNATE
bool

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@ -245,7 +245,6 @@ ramstage-y += cpu_common.c
ramstage-y += ebda.c
ramstage-y += exception.c
ramstage-y += idt.S
ramstage-y += gdt.c
ramstage-$(CONFIG_IOAPIC) += ioapic.c
ramstage-y += memcpy.c
ramstage-y += memmove.c
@ -291,14 +290,10 @@ endif
ramstage-libs ?=
ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y)
# The rmodule_link definition creates an elf file with .rmod extension.
$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod
cp $< $@
endif
$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(call src-to-obj,ramstage,$(CONFIG_MEMLAYOUT_LD_FILE))
@printf " CC $(subst $(obj)/,,$(@))\n"
$(LD_ramstage) $(CPPFLAGS) $(LDFLAGS_ramstage) -o $@ -L$(obj) $< -T $(call src-to-obj,ramstage,$(CONFIG_MEMLAYOUT_LD_FILE))

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@ -1,52 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <types.h>
#include <string.h>
#include <cbmem.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <cpu/x86/gdt.h>
/* i386 lgdt argument */
struct gdtarg {
u16 limit;
#ifdef __x86_64__
u64 base;
#else
u32 base;
#endif
} __packed;
/*
* Copy GDT to new location and reload it.
* FIXME: We only do this for BSP CPU.
*/
static void move_gdt(int is_recovery)
{
void *newgdt;
u16 num_gdt_bytes;
struct gdtarg gdtarg;
/* ramstage is already in high memory. No need to use a new gdt. */
if (CONFIG(RELOCATABLE_RAMSTAGE))
return;
newgdt = cbmem_find(CBMEM_ID_GDT);
num_gdt_bytes = (uintptr_t)&gdt_end - (uintptr_t)&gdt;
if (!newgdt) {
newgdt = cbmem_add(CBMEM_ID_GDT, ALIGN_UP(num_gdt_bytes, 512));
if (!newgdt) {
printk(BIOS_ERR, "Error: Could not relocate GDT.\n");
return;
}
memcpy((void *)newgdt, &gdt, num_gdt_bytes);
}
printk(BIOS_DEBUG, "Moving GDT to %p...", newgdt);
gdtarg.base = (uintptr_t)newgdt;
gdtarg.limit = num_gdt_bytes - 1;
__asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
printk(BIOS_DEBUG, "ok\n");
}
RAMSTAGE_CBMEM_INIT_HOOK(move_gdt)

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@ -13,8 +13,7 @@ SECTIONS
* conditionalize with macros.
*/
#if ENV_RAMSTAGE
RAMSTAGE(CONFIG_RAMBASE, (CONFIG(RELOCATABLE_RAMSTAGE) ? 8M :
CONFIG_RAMTOP - CONFIG_RAMBASE))
RAMSTAGE(CONFIG_RAMBASE, 8M)
#elif ENV_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.

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@ -129,10 +129,9 @@ void run_ramstage(void)
timestamp_add_now(TS_START_COPYRAM);
if (CONFIG(RELOCATABLE_RAMSTAGE)) {
if (load_relocatable_ramstage(&ramstage))
if (ENV_X86 && load_relocatable_ramstage(&ramstage))
goto fail;
} else if (cbfs_prog_stage_load(&ramstage))
else if (cbfs_prog_stage_load(&ramstage))
goto fail;
stage_cache_add(STAGE_RAMSTAGE, &ramstage);

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@ -4,9 +4,8 @@ menu "Memory initialization"
config PLATFORM_HAS_DRAM_CLEAR
bool
default y if ARCH_X86
default n
depends on RELOCATABLE_RAMSTAGE
default y
depends on ARCH_X86
help
Selected by platforms that support clearing all DRAM
after DRAM initialization.

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@ -77,8 +77,7 @@ static void clear_memory(void *unused)
void *baseptr = NULL;
size_t size = 0;
/* Only skip CBMEM, as RELOCATABLE_RAMSTAGE is a requirement, no need
* to separately protect stack or heap */
/* Only skip CBMEM, stage program, stack and heap are included there. */
cbmem_get_region(&baseptr, &size);
memranges_insert(&mem, (uintptr_t)baseptr, size, BM_MEM_TABLE);