exynos5250: make lowlevel_init_c.c benign
This file has mostly (but not entirely) been replaced by coreboot stage files. We'll keep it around for a bit longer as a reference, but in the meantime we'll stop compiling it as to avoid comptilation issues as we change other parts of the code. Change-Id: I669fb1e5a1517f35979590957d581bd33df53d29 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2269 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -12,7 +12,6 @@ bootblock-y += clock.c
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romstage-y += clock.c
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romstage-y += clock_init.c
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romstage-y += exynos_cache.c
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romstage-y += lowlevel_init_c.c
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romstage-y += pinmux.c
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romstage-y += power.c
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romstage-y += soc.c
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@ -29,7 +28,6 @@ romstage-y += dmc_init_ddr3.c
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ramstage-y += clock.c
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ramstage-y += clock_init.c
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ramstage-y += exynos_cache.c
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ramstage-y += lowlevel_init_c.c
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ramstage-y += pinmux.c
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ramstage-y += power.c
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ramstage-y += soc.c
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@ -37,7 +35,6 @@ ramstage-y += uart.c
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#ramstage-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.c
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#ramstage-$(CONFIG_SATA_AHCI) += sata.c
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ramstage-$(CONFIG_SPL_BUILD) += lowlevel_init_c.c
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exynos5250_add_bl1: $(obj)/coreboot.pre
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printf " DD Adding Samsung Exynos5250 BL1\n"
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@ -23,6 +23,12 @@
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* MA 02111-1307 USA
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*/
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/*
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* FIXME: This file is essentially the "bootblock" leftover from U-Boot. For
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* now it serves as a reference until all the resume-related stuff is added
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* to the appropriate bootblock/romstage/ramstage files in coreboot.
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*/
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#include <common.h>
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#include <config.h>
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#include <cpu/samsung/exynos5-common/exynos5-common.h>
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