intel/nehalem: Add get_top_top_ram() in ramstage

Needed to resolve CBMEM location early in ramstage. With DYNAMIC_CBMEM
set_top_of_ram() will no longer be available.

Change-Id: If50f1c5455a587b096348ffedadbe1dd2350a714
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6030
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
This commit is contained in:
Kyösti Mälkki 2014-06-15 12:06:12 +03:00
parent aac45febc7
commit 191d221920
3 changed files with 33 additions and 9 deletions

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@ -17,12 +17,14 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
# #
ramstage-y += ram_calc.c
ramstage-y += northbridge.c ramstage-y += northbridge.c
ramstage-y += gma.c ramstage-y += gma.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
ramstage-y += ../sandybridge/mrccache.c ramstage-y += ../sandybridge/mrccache.c
romstage-y += ram_calc.c
romstage-y += raminit.c romstage-y += raminit.c
romstage-y += early_init.c romstage-y += early_init.c
romstage-y += ../sandybridge/mrccache.c romstage-y += ../sandybridge/mrccache.c

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@ -0,0 +1,31 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Vladimir Serbinenko.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define __SIMPLE_DEVICE__
#include <arch/io.h>
#include <cbmem.h>
#include "nehalem.h"
unsigned long get_top_of_ram(void)
{
/* Base of TSEG is top of usable DRAM */
u32 tom = pci_read_config32(PCI_DEV(0,0,0), TSEG);
return (unsigned long) tom;
}

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@ -4979,12 +4979,3 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
save_timings(&info); save_timings(&info);
#endif #endif
} }
#if REAL
unsigned long get_top_of_ram(void)
{
/* Base of TSEG is top of usable DRAM */
u32 tom = pci_read_config32(PCI_DEV(0, 0, 0), TSEG);
return (unsigned long)tom;
}
#endif