amd/{hudson,stoney,picasso}: Drop PM2 settings from FADT
The PM2_CNT register block is no longer needed, as explained in some comments. While they may have been copy-pasted around a lot, they are at least true for Hudson, and it makes sense to assume that they are true for newer chipsets as well. As per the ACPI specification, version 6.3, section 4.8.1.3 (PM2 Control Register): This register block is optional, if not supported its block pointer and length contain a value of zero. Since the FADT struct defaults to zero in coreboot, we don't need to do anything to indicate PM2_CNT is not supported. So, drop unneeded values. Change-Id: Iabc7985c84aabe40ad98fdc9fc6ccbbab0a516c1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43381 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -100,13 +100,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
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fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
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fadt->pm2_cnt_blk = 0x0000;
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fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
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fadt->gpe0_blk = ACPI_GPE0_BLK;
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fadt->pm1_evt_len = 4; /* 32 bits */
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fadt->pm1_cnt_len = 2; /* 16 bits */
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fadt->pm2_cnt_len = 0;
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fadt->pm_tmr_len = 4; /* 32 bits */
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fadt->gpe0_blk_len = 8; /* 64 bits */
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@ -164,17 +162,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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/*
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* Note: Under this current AMD C state implementation, this is no
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* longer used and should not be reported to OS.
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*/
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fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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fadt->x_pm2_cnt_blk.addrl = 0;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm_tmr_blk.bit_width = 32;
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@ -72,13 +72,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
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fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
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fadt->pm2_cnt_blk = 0x0000;
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fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
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fadt->gpe0_blk = ACPI_GPE0_BLK;
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fadt->pm1_evt_len = 4; /* 32 bits */
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fadt->pm1_cnt_len = 2; /* 16 bits */
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fadt->pm2_cnt_len = 0;
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fadt->pm_tmr_len = 4; /* 32 bits */
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fadt->gpe0_blk_len = 8; /* 64 bits */
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@ -136,17 +134,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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/*
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* Note: Under this current AMD C state implementation, this is no
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* longer used and should not be reported to OS.
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*/
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fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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fadt->x_pm2_cnt_blk.addrl = 0;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm_tmr_blk.bit_width = 32;
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@ -36,13 +36,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
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fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
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fadt->pm2_cnt_blk = 0x0000;
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fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
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fadt->gpe0_blk = ACPI_GPE0_BLK;
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fadt->pm1_evt_len = 4; /* 32 bits */
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fadt->pm1_cnt_len = 2; /* 16 bits */
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fadt->pm2_cnt_len = 0;
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fadt->pm_tmr_len = 4; /* 32 bits */
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fadt->gpe0_blk_len = 8; /* 64 bits */
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@ -97,17 +95,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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/*
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* Note: Under this current AMD C state implementation, this is no longer
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* used and should not be reported to OS.
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*/
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fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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fadt->x_pm2_cnt_blk.addrl = 0;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm_tmr_blk.bit_width = 32;
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@ -36,13 +36,11 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
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fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
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fadt->pm2_cnt_blk = 0x0000;
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fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
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fadt->gpe0_blk = ACPI_GPE0_BLK;
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fadt->pm1_evt_len = 4; /* 32 bits */
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fadt->pm1_cnt_len = 2; /* 16 bits */
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fadt->pm2_cnt_len = 0;
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fadt->pm_tmr_len = 4; /* 32 bits */
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fadt->gpe0_blk_len = 8; /* 64 bits */
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@ -100,17 +98,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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fadt->x_pm1a_cnt_blk.addrl = ACPI_PM1_CNT_BLK;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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/*
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* Note: Under this current AMD C state implementation, this is no longer
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* used and should not be reported to OS.
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*/
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fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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fadt->x_pm2_cnt_blk.addrl = 0;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm_tmr_blk.bit_width = 32;
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