mb/google/poppy/variants/nami: Remove iccmax setting from devicetree
Change e1a75d4(soc/intel/skylake: Override KBL IccMax settings) provides correct iccmax settings for kbl-u based on the SKU. Thus, there is no need to override these values in devicetree. This change gets rid of iccmax settings in the nami devicetree. Change-Id: Ie7220bae71fcc597fc20c5e98793d4ea7af5650e Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/23265 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -79,7 +79,6 @@ chip soc/intel/skylake
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#| Psi4Enable | 1 | 1 | 1 | 1 |
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#| Psi4Enable | 1 | 1 | 1 | 1 |
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#| ImonSlope | 0 | 0 | 0 | 0 |
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#| ImonSlope | 0 | 0 | 0 | 0 |
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#| ImonOffset | 0 | 0 | 0 | 0 |
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#| ImonOffset | 0 | 0 | 0 | 0 |
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#| IccMax | 5A | 24A | 24A | 24A |
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#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
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#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
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#| AcLoadline | 15 | 5.7 | 5.5 | 5.5 |
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#| AcLoadline | 15 | 5.7 | 5.5 | 5.5 |
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#| DcLoadline | 14.3 | 4.83 | 4.2 | 4.2 |
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#| DcLoadline | 14.3 | 4.83 | 4.2 | 4.2 |
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@ -93,7 +92,6 @@ chip soc/intel/skylake
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.psi4enable = 1,
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.psi4enable = 1,
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.imon_slope = 0x0,
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.imon_slope = 0x0,
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.imon_offset = 0x0,
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.imon_offset = 0x0,
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.icc_max = VR_CFG_AMP(5),
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.voltage_limit = 1520,
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.voltage_limit = 1520,
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.ac_loadline = 1500,
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.ac_loadline = 1500,
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.dc_loadline = 1430,
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.dc_loadline = 1430,
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@ -108,7 +106,6 @@ chip soc/intel/skylake
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.psi4enable = 1,
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.psi4enable = 1,
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.imon_slope = 0x0,
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.imon_slope = 0x0,
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.imon_offset = 0x0,
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.imon_offset = 0x0,
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.icc_max = VR_CFG_AMP(24),
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.voltage_limit = 1520,
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.voltage_limit = 1520,
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.ac_loadline = 570,
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.ac_loadline = 570,
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.dc_loadline = 483,
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.dc_loadline = 483,
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@ -123,7 +120,6 @@ chip soc/intel/skylake
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.psi4enable = 1,
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.psi4enable = 1,
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.imon_slope = 0x0,
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.imon_slope = 0x0,
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.imon_offset = 0x0,
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.imon_offset = 0x0,
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.icc_max = VR_CFG_AMP(24),
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.voltage_limit = 1520,
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.voltage_limit = 1520,
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.ac_loadline = 550,
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.ac_loadline = 550,
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.dc_loadline = 420,
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.dc_loadline = 420,
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@ -138,7 +134,6 @@ chip soc/intel/skylake
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.psi4enable = 1,
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.psi4enable = 1,
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.imon_slope = 0x0,
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.imon_slope = 0x0,
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.imon_offset = 0x0,
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.imon_offset = 0x0,
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.icc_max = VR_CFG_AMP(24),
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.voltage_limit = 1520,
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.voltage_limit = 1520,
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.ac_loadline = 550,
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.ac_loadline = 550,
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.dc_loadline = 420,
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.dc_loadline = 420,
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