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amd/lpc: Remove the weak function 

BUG=b:140165023

Change-Id: Idb4613dc08c8dee6c92b4dabb39c2f5c189471aa
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Zheng Bao 2021-10-30 21:30:34 +08:00 committed by Patrick Georgi
parent 72e76676fc
commit 19b3102910
2 changed files with 0 additions and 7 deletions
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2
src/soc/amd/common/block/include/amdblocks/lpc.h
View File

@ -141,8 +141,6 @@
/* Clear all decoding to the LPC bus and erase any range registers associated /* Clear all decoding to the LPC bus and erase any range registers associated
* with the enable bits. */ * with the enable bits. */
void lpc_disable_decodes(void); void lpc_disable_decodes(void);
/* LPC is typically enabled very early, but this function is last opportunity */
void soc_late_lpc_bridge_enable(void);
void lpc_enable_port80(void); void lpc_enable_port80(void);
void lpc_enable_pci_port80(void); void lpc_enable_pci_port80(void);
void lpc_enable_decode(uint32_t decodes); void lpc_enable_decode(uint32_t decodes);

5
src/soc/amd/common/block/lpc/lpc.c
View File

@ -20,9 +20,6 @@
#include <soc/lpc.h> #include <soc/lpc.h>
#include <soc/southbridge.h> #include <soc/southbridge.h>
/* Most systems should have already enabled the bridge */
void __weak soc_late_lpc_bridge_enable(void) { }
static void setup_serirq(void) static void setup_serirq(void)
{ {
u8 byte; u8 byte;
@ -41,8 +38,6 @@ static void lpc_init(struct device *dev)
{ {
u8 byte; u8 byte;
soc_late_lpc_bridge_enable();
/* Initialize isa dma */ /* Initialize isa dma */
isa_dma_init(); isa_dma_init();