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veyron: The ODT function is disabled for LPDDR3 

We found that we should better keep ODT off for LPDDR3 on our boards.

BRANCH=veyron
BUG=chrome-os-partner:37346
TEST=Boot veyron_speedy normal

Change-Id: Id158c88769cf7ed1a5127cd09bad679a2f5e6a01
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0d85725a6faedb5bdbe8731991c225c31f138599
Original-Change-Id: Iebb8e74706756508dd56b85ad87baad48893c619
Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com>
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/255381
Reviewed-on: http://review.coreboot.org/9830
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
jinkun.hong 2015-03-03 14:20:58 +08:00 committed by Patrick Georgi
parent c447f43f94
commit 19ee1569f6
10 changed files with 10 additions and 10 deletions
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2
src/mainboard/google/veyron_brain/sdram_inf/sdram-lpddr3-samsung-2GB.inc
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@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_danger/sdram_inf/sdram-lpddr3-samsung-2GB.inc
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@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_jerry/sdram_inf/sdram-lpddr3-samsung-2GB.inc
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@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View File

@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_pinky/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View File

@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc
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@ -73,5 +73,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 1, .num_channels = 1,
.stride = 22, .stride = 22,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-hynix-2GB.inc
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@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-hynix-4GB.inc
View File

@ -73,5 +73,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 13, .stride = 13,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-samsung-2GB.inc
View File

@ -74,5 +74,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 9, .stride = 9,
.odt = 1 .odt = 0,
}, },

2
src/mainboard/google/veyron_speedy/sdram_inf/sdram-lpddr3-samsung-4GB.inc
View File

@ -73,5 +73,5 @@
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 13, .stride = 13,
.odt = 1 .odt = 0,
}, },