Append logical PME/GPIO device. Fix MPU device number.
A mainboard may require configuration of the superio pins to fully support some features. Things like A20# gate, leds, fans, infra-red and bootstrap jumpers may be configured and controlled through the logical PME device. Change-Id: I6e77ff0295806ba3dff339013f73d99c2961388f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/289 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -30,7 +30,7 @@
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#define LPC47M10X2_KBC 7 /* Keyboard & Mouse */
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#define LPC47M10X2_KBC 7 /* Keyboard & Mouse */
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#define LPC47M10X2_GAME 9 /* GAME */
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#define LPC47M10X2_GAME 9 /* GAME */
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#define LPC47M10X2_PME 10 /* PME reg*/
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#define LPC47M10X2_PME 10 /* PME reg*/
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#define LPC47M10X2_MPU 10 /* MPE -- who knows -- reg*/ // FIXME
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#define LPC47M10X2_MPU 11 /* MPU-401 MIDI */
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#define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F
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#define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F
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@ -65,6 +65,7 @@ static struct pnp_info pnp_dev_info[] = {
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{ &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
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{ &ops, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
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{ &ops, LPC47M10X2_PME, PNP_IO0, { 0x0f80, 0 }, },
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};
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};
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/**
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/**
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